-
1.
公开(公告)号:US11386819B2
公开(公告)日:2022-07-12
申请号:US16894075
申请日:2020-06-05
Applicant: Samsung Display Co., Ltd.
Inventor: Taegon Im , Sooyeon Kim , JiYe Lee , Hee-Jeong Seo , Junghwan Cho
IPC: G09G3/00 , G09G3/3225 , G06F1/16
Abstract: A display device includes a display panel including first and second panel pads electrically connected to each other, a connection board including first and second connection board pads connected to the first and second panel pads, respectively, an output pad, and a driving circuit. The driving circuit includes a pull-up resistor connected between a first voltage terminal and a first node, and a comparator configured to compare a voltage at the first node with a reference voltage and to output a contact test signal corresponding to a comparison result to the output pad. The first connection board pad is electrically connected to the first node, and the second connection board pad is connected to a second voltage terminal.
-
公开(公告)号:US20190279556A1
公开(公告)日:2019-09-12
申请号:US16351321
申请日:2019-03-12
Applicant: Samsung Display Co., Ltd.
Inventor: Po-Yun Park , Ga-Na Kim , Hong-Kyu Kim , Junghwan Cho
IPC: G09G3/20
Abstract: A display panel driving control circuit includes a configuration channel configured to determine whether a reversible connector not having designated up and down sides is connected in a first connection state or in a second connection state, and to generate a selection signal based on the determination, and a timing control circuit configured to receive image data in the first connection state and image data in the second connection state based on the selection signal, to process the received image data in the first connection state and the received image data in the second connection state, and to generate a data signal based on the processing.
-
3.
公开(公告)号:US09984610B2
公开(公告)日:2018-05-29
申请号:US15163526
申请日:2016-05-24
Applicant: SAMSUNG DISPLAY CO., LTD.
Inventor: Kuk-Hwan Ahn , Jai-Hyun Koh , Heendol Kim , Jin-Kyu Park , Seokyun Son , Junghwan Cho
CPC classification number: G09G3/2003 , G09G3/3406 , G09G3/3607 , G09G2320/0285 , G09G2320/0646 , G09G2320/0673 , G09G2340/06 , G09G2360/16 , H04N5/202 , H04N9/69
Abstract: A signal processing circuit includes an input gamma adjuster configured to adjust gamma characteristics of an image signal and to output a gamma adjustment image signal, an image signal processor configured to generate a scaling signal corresponding to image characteristics of the gamma adjustment image signal and to convert the gamma adjustment image signal into an intermediate data signal in response to the scaling signal, and an output gamma adjuster configured to convert the intermediate data signal into a data signal on a basis of a first lookup table corresponding to a first gamma curve, a second lookup table corresponding to a second gamma curve, and the scaling signal.
-
公开(公告)号:US12027094B2
公开(公告)日:2024-07-02
申请号:US17115838
申请日:2020-12-09
Applicant: Samsung Display Co., Ltd.
Inventor: Sooyeon Kim , Hee-Jeong Seo , Jiye Lee , Taegon Im , Junghwan Cho
IPC: G09G3/3275 , G09G3/20
CPC classification number: G09G3/2092 , G09G2310/027 , G09G2310/0275
Abstract: Provided is a data driver including a digital to analog converter configured to convert image signal data into a plurality of data voltages, and an output buffer unit including a plurality of channels for outputting the plurality of data voltages. The output buffer unit includes a plurality of output blocks. Each output block includes one or more channels. Data voltages outputted from a first output block among the plurality of output blocks are delayed with a first time difference. Data voltages outputted from a second output block among the plurality of output blocks are delayed with a second time difference which is different from the first time difference.
-
公开(公告)号:US20170110044A1
公开(公告)日:2017-04-20
申请号:US15163526
申请日:2016-05-24
Applicant: SAMSUNG DISPLAY CO., LTD.
Inventor: Kuk-Hwan Ahn , Jai-Hyun Koh , Heendol Kim , Jin-Kyu Park , Seokyun Son , Junghwan Cho
IPC: G09G3/20
CPC classification number: G09G3/2003 , G09G3/3406 , G09G3/3607 , G09G2320/0285 , G09G2320/0646 , G09G2320/0673 , G09G2340/06 , G09G2360/16 , H04N5/202 , H04N9/69
Abstract: A signal processing circuit includes an input gamma adjuster configured to adjust gamma characteristics of an image signal and to output a gamma adjustment image signal, an image signal processor configured to generate a scaling signal corresponding to image characteristics of the gamma adjustment image signal and to convert the gamma adjustment image signal into an intermediate data signal in response to the scaling signal, and an output gamma adjuster configured to convert the intermediate data signal into a data signal on a basis of a first lookup table corresponding to a first gamma curve, a second lookup table corresponding to a second gamma curve, and the scaling signal.
-
公开(公告)号:US10854155B2
公开(公告)日:2020-12-01
申请号:US16407324
申请日:2019-05-09
Applicant: SAMSUNG DISPLAY CO., LTD.
Inventor: Kyoungwon Lee , Kwan-young Oh , Jimyoung Seo , Bonghyun You , Junghwan Cho , Sangsu Han
Abstract: A display apparatus includes a display panel, a timing controller, a data driver, and a gate driver. The timing controller receives image data at a number of frames per second of a first level and generates a gate control signal and a data control signal. The timing controller includes an image converter that operates in film mode or normal mode when the input image data are moving image data, and that outputs film image data at a number of frames per second of second level lower than the first level during the film mode. The data driver applies a data voltage corresponding to the film image data to the display panel based on the data control signal. The gate driver applies a gate voltage to the display panel based on the gate control signal. The display panel operates at a frequency of the second level during the film mode.
-
公开(公告)号:US10311812B2
公开(公告)日:2019-06-04
申请号:US15446137
申请日:2017-03-01
Applicant: SAMSUNG DISPLAY CO., LTD.
Inventor: Kyoungwon Lee , Kwan-young Oh , Jimyoung Seo , Bonghyun You , Junghwan Cho , Sangsu Han
Abstract: A display apparatus includes a display panel, a timing controller, a data driver, and a gate driver. The timing controller receives image data at a number of frames per second of a first level and generates a gate control signal and a data control signal. The timing controller includes an image converter that operates in film mode or normal mode when the input image data are moving image data, and that outputs film image data at a number of frames per second of second level lower than the first level during the film mode. The data driver applies a data voltage corresponding to the film image data to the display panel based on the data control signal. The gate driver applies a gate voltage to the display panel based on the gate control signal. The display panel operates at a frequency of the second level during the film mode.
-
公开(公告)号:US20190066621A1
公开(公告)日:2019-02-28
申请号:US16110304
申请日:2018-08-23
Applicant: SAMSUNG DISPLAY CO., LTD.
Inventor: Taegon Im , Boyeon Kim , Dongwon Park , Junghwan Cho
IPC: G09G3/36
CPC classification number: G09G3/3688 , G09G3/3677 , G09G3/3696 , G09G2310/027 , G09G2310/0291 , G09G2310/08 , G09G2320/0233 , G09G2320/041
Abstract: A display device having a charging compensation circuit to reduce/eliminate display stains based on pixels being charged at unequal charging rates. A data driving circuit of a display device includes an output circuit for converting an image signal into a data signal in response to a clock signal, and providing the data signal to a plurality of data lines, and a clock generating and compensating circuit for receiving a main clock signal and generating the clock signal, wherein the clock generating and compensating circuit detects a slew rate of the data signal provided to at least one of the plurality of data lines, and adjusts a phase of the clock signal depending on the detected slew rate.
-
公开(公告)号:US10685617B2
公开(公告)日:2020-06-16
申请号:US16110304
申请日:2018-08-23
Applicant: SAMSUNG DISPLAY CO., LTD.
Inventor: Taegon Im , Boyeon Kim , Dongwon Park , Junghwan Cho
IPC: G09G3/36
Abstract: A display device having a charging compensation circuit to reduce/eliminate display stains based on pixels being charged at unequal charging rates. A data driving circuit of a display device includes an output circuit for converting an image signal into a data signal in response to a clock signal, and providing the data signal to a plurality of data lines, and a clock generating and compensating circuit for receiving a main clock signal and generating the clock signal, wherein the clock generating and compensating circuit detects a slew rate of the data signal provided to at least one of the plurality of data lines, and adjusts a phase of the clock signal depending on the detected slew rate.
-
公开(公告)号:US10540939B2
公开(公告)日:2020-01-21
申请号:US15598459
申请日:2017-05-18
Applicant: SAMSUNG DISPLAY CO., LTD.
Inventor: Jimyoung Seo , Kyoungwon Lee , Silyi Bang , Kwan-Young Oh , Junghwan Cho , Sangsu Han , Sangmi Kim , Jang-Hyun Yeo
IPC: G09G3/36
Abstract: A display apparatus includes a display panel to display an image, a first frame counter to count a first number of frames during a first duration and to be reset when the first number reaches a first reference number, a second frame counter to count a second number of the frames during a second duration and to be reset when the second number reaches a second reference number, wherein the second duration occurs after and is shorter than the first duration, a level counter to hold a count value at a first count value during the first duration, to change the count value when the first frame counter is reset, and to change the count value when the second frame counter is reset, and a common voltage generator to control a level of a common voltage to correspond to the count value and to output the common voltage.
-
-
-
-
-
-
-
-
-