公开(公告)号：US20220077267A1

公开(公告)日：2022-03-10

申请号：US17318350

申请日：2021-05-12

Applicant: Samsung Display Co., Ltd.

Inventor： HYUNGJUN KIM ,  SOYOUNG KOO ,  EOK SU KIM ,  YUNYONG NAM ,  JUN HYUNG LIM ,  KYUNGJIN JEON

IPC: H01L27/32 ,  H01L51/56

Abstract: A display device includes a first transistor including a first transistor including a light blocking pattern on a substrate, an active pattern on the light blocking pattern, and a gate electrode on the active pattern, a second transistor configured to provide a data voltage to the first transistor in response to a gate signal, and a storage capacitor electrically connected to the gate electrode and the light blocking pattern, and including a first conductive pattern in a same layer as the light blocking pattern, a second conductive pattern on the first conductive pattern and overlapping the first conductive pattern, a third conductive pattern in a same layer as the gate electrode, overlapping the second conductive pattern, and electrically connected to the first conductive pattern, and a fourth conductive pattern on the third conductive pattern, overlapping the third conductive pattern, and electrically connected to the second conductive pattern.

公开(公告)号：US20250151524A1

公开(公告)日：2025-05-08

申请号：US19019252

申请日：2025-01-13

Applicant: SAMSUNG DISPLAY CO., LTD.

Inventor： HYUNGJUN KIM ,  SOYOUNG KOO ,  EOK SU KIM ,  YUNYONG NAM ,  JUN HYUNG LIM ,  KYUNGJIN JEON

IPC: H10K59/121 ,  H10K59/12 ,  H10K59/123 ,  H10K59/126 ,  H10K71/00

Abstract: A display device includes a first transistor including a first transistor including a light blocking pattern on a substrate, an active pattern on the light blocking pattern, and a gate electrode on the active pattern, a second transistor configured to provide a data voltage to the first transistor in response to a gate signal, and a storage capacitor electrically connected to the gate electrode and the light blocking pattern, and including a first conductive pattern in a same layer as the light blocking pattern, a second conductive pattern on the first conductive pattern and overlapping the first conductive pattern, a third conductive pattern in a same layer as the gate electrode, overlapping the second conductive pattern, and electrically connected to the first conductive pattern, and a fourth conductive pattern on the third conductive pattern, overlapping the third conductive pattern, and electrically connected to the second conductive pattern.

公开(公告)号：US20230282790A1

公开(公告)日：2023-09-07

申请号：US17973487

申请日：2022-10-25

Applicant: Samsung Display Co., Ltd.

Inventor： YUNYONG NAM ,  EOK SU KIM ,  HYUNGJUN KIM ,  JUN HYUNG LIM ,  KYUNGJIN JEON

IPC: H01L33/62 ,  H01L33/38 ,  H01L33/00 ,  H01L33/42

CPC classification number: H01L33/62 ,  H01L33/387 ,  H01L33/005 ,  H01L33/42 ,  H01L2933/0016 ,  H01L2933/0066

Abstract: Provided is a display device including a voltage line, a passivation layer disposed on the voltage line and having an undercut shape, a first connecting electrode disposed inside the undercut shape, a second connecting electrode electrically connecting the voltage line and the first connecting line, and a common electrode electrically connected to the voltage line through at least one of the first connecting electrode and the second connecting electrode.