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公开(公告)号：US10319310B2
公开(公告)日：2019-06-11
申请号：US15242454
申请日：2016-08-19
发明人： Jung-taek Kim , Kyoungwon Lee , Joon-chul Goh , Youngwoo Choi
摘要： A display device includes: a display panel including first group pixels connected to a first gate line to receive first data voltages, and second group pixels connected to the first gate line to receive second data voltages; a backlight source to provide light to the display panel; a signal controller to divide horizontal image signals into first group image signals and second group image signals, to extract a first maximum grayscale image signal from the first group image signals, and to extract a second maximum grayscale image signal from the second group image signals; a power supply to generate first and second gamma driving voltages from a reference gamma driving voltage based on a grayscale level of the first maximum grayscale image signal and a grayscale level of the second maximum grayscale image signal.
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公开(公告)号：US20220140042A1
公开(公告)日：2022-05-05
申请号：US17332698
申请日：2021-05-27
发明人： Eunhyun Kim , Eunhye Ko , Yeonhong Kim , Kyoungwon Lee , Sunhee Lee , Junhyung Lim
IPC分类号： H01L27/32
摘要： A display apparatus in which an area of a peripheral area may be reduced while having a simple structure, the display apparatus includes a substrate, a bottom metal layer on the substrate and including a first extension line extending from the peripheral area outside a display area into the display area, a semiconductor layer on the bottom metal layer, a gate layer on the semiconductor layer, a first metal layer on the gate layer, and a second metal layer on the first metal layer and including a first data line extending from the peripheral area into the display area and electrically coupled to the first extension line in the peripheral area.
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公开(公告)号：US10910477B2
公开(公告)日：2021-02-02
申请号：US16781081
申请日：2020-02-04
发明人： Jongchan Lee , Taehoon Yang , Woonghee Jeong , Kyoungwon Lee , Yongsu Lee
IPC分类号： H01L21/44 , H01L21/02 , H01L29/417 , H01L29/66 , H01L27/12 , H01L29/786
摘要： A display device includes a first insulation layer on a first gate electrode, an active pattern on the first insulation layer and including an NMOS area and a PMOS area, the PMOS area overlapping the first gate electrode, a second insulation layer on the active pattern. The active pattern includes an NMOS area and a PMOS area, with the PMOS area overlapping the first gate electrode. In addition, a second gate electrode is on the second insulation layer and overlaps the NMOS area. An active-protecting pattern is in the same layer as the second gate electrode and passes through the second insulation layer to contact the PMOS area. A third insulation layer is on the active-protecting pattern and the second gate electrode. A data metal electrode passes through the third insulation layer and contacts the active-protecting pattern.
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公开(公告)号：US10573698B2
公开(公告)日：2020-02-25
申请号：US14919666
申请日：2015-10-21
发明人： Kyoungwon Lee , Yoonho Khang , Myounggeun Cha , Youngki Shin , Woonghee Jeong
IPC分类号： H01L27/12 , H01L27/105 , H01L27/32 , H01L29/786 , G09G3/3233 , H01L29/66
摘要： A transistor including a polysilicon layer on a base substrate and including a channel region, a first ion doping region, a second ion doping region, the channel region being between the first and second ion doping regions, an average size of the grains in the channel region being greater than that of the grains in the first and second ion doping regions, a first gate electrode insulated from and overlapping the channel region, a second gate electrode insulated from the first gate electrode and overlapping the channel region, an inter-insulating layer on the second gate electrode, a source electrode on the inter-insulating layer and connected to the first ion doping region, and a drain electrode on the inter-insulating layer and connected to the second ion doping region.
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公开(公告)号：US20190296095A1
公开(公告)日：2019-09-26
申请号：US16437857
申请日：2019-06-11
发明人： Jongchan Lee , Taehoon Yang , Woonghee Jeong , Kyoungwon Lee , Yongsu Lee
摘要： A display device includes at least one transistor. The transistor has an active pattern including a first active area and a second active area. The first active area includes a first channel area and an n-doped area contacting the first channel area. The second active area includes a second channel area and a p-doped area contacting the second channel area. A first insulation layer covers at least a portion of the active pattern. A first gate electrode is disposed on the first insulation layer and at least partially overlaps the first channel area. A second gate electrode is disposed on the first insulation layer and at least partially overlaps the second channel area. A taper angle of the second gate electrode is larger than a taper angle of the first gate electrode.
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公开(公告)号：US10403649B2
公开(公告)日：2019-09-03
申请号：US15869748
申请日：2018-01-12
发明人： Woonghee Jeong , Taehoon Yang , Kyoungwon Lee , Jongchan Lee , Yongsu Lee
摘要： A display device includes a common active pattern, a first gate electrode, and a second gate electrode. The common active pattern includes an NMOS area, a PMOS area, and a silicide area in a same layer as the NMOS area and the PMOS area. The silicide area electrically connects the NMOS area to the PMOS area. The NMOS area includes a first channel area and an n-doped area contacting the first channel area. The PMOS area includes a second channel area and a p-doped area contacting the second channel area. The first gate electrode overlaps the first channel area, and the second gate electrode overlaps the second channel area.
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公开(公告)号：US10373575B2
公开(公告)日：2019-08-06
申请号：US14755241
申请日：2015-06-30
发明人： Suhyeong Park , Kyoungwon Lee , Hoyong Jung , Cheolwoo Park , Bonghyun You
IPC分类号： G09G3/36
摘要： A display apparatus includes: a timing control block which outputs image data based on external image data and control signals, and generates data and gate-side control signals based on the external control signal; a source drive block which converts the image data into a data voltage based on the data control signal; a low frequency detection block which detects a low power drive period based on the external control signal and generates a power control signal, a state of which is determined based on a result of the detection; an integrated chip which receives first and second drive voltages and includes a first switch block that turns off a circuit of the source drive block based on the power control signal during the low power drive period; a gate drive circuit which generates a gate signal based on a gate control signal from the integrated chip; and a display panel.
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8.发明授权Thin film transistor substrate, display apparatus comprising the same, method of manufacturing thin film transistor substrate, and method of manufacturing display apparatus 有权薄膜晶体管基板，包括该薄膜晶体管基板的显示装置，制造薄膜晶体管基板的方法以及制造显示装置的方法公开(公告)号：US09437624B2
公开(公告)日：2016-09-06
申请号：US14689927
申请日：2015-04-17
发明人： Myounggeun Cha , Dongjo Kim , Yoonho Khang , Myounghwa Kim , Kyoungwon Lee
IPC分类号： H01L29/12 , H01L27/12 , H01L29/786 , H01L29/66
CPC分类号： H01L27/1255 , H01L27/1274 , H01L29/66757 , H01L29/66765 , H01L29/78645 , H01L29/78648 , H01L29/78675 , H01L29/78678
摘要： A thin film transistor (TFT) substrate, a flat display apparatus including the TFT substrate, a method of manufacturing the TFT substrate, and a method of manufacturing the flat display apparatus, the thin film transistor (TFT) substrate including a substrate; a first gate electrode on the substrate, the first gate electrode including a first branch electrode and a second branch electrode that are spaced apart from one another; a polysilicon layer on the first gate electrode and insulated from the first gate electrode; and a second gate electrode on the polysilicon layer, the second gate electrode being insulated from the polysilicon layer and overlying the first and second branch electrodes.
摘要翻译： 薄膜晶体管（TFT）基板，包括TFT基板的平面显示装置，TFT基板的制造方法以及制造平面显示装置的方法，所述薄膜晶体管（TFT）基板包括基板; 在所述基板上的第一栅电极，所述第一栅极包括彼此间隔开的第一分支电极和第二分支电极; 在所述第一栅电极上并与所述第一栅电极绝缘的多晶硅层; 以及在所述多晶硅层上的第二栅电极，所述第二栅电极与所述多晶硅层绝缘并且覆盖所述第一和第二分支电极。
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9.发明申请TRANSISTOR, ORGANIC LIGHT EMITTING DISPLAY HAVING THE SAME, AND METHOD OF MANUFACTURING ORGANIC LIGHT EMITTING DISPLAY 审中-公开晶体管，有机发光显示器，以及制造有机发光显示器的方法公开(公告)号：US20160148986A1
公开(公告)日：2016-05-26
申请号：US14919666
申请日：2015-10-21
发明人： Kyoungwon Lee , Yoonho Khang , Myounggeun Cha , Youngki Shin , Woonghee Jeong
CPC分类号： H01L27/3262 , G09G3/3233 , G09G2300/0842 , H01L27/3265 , H01L29/6675 , H01L29/78645 , H01L29/78675 , H01L29/78696
摘要： A transistor including a polysilicon layer on a base substrate and including a channel region, a first ion doping region, a second ion doping region, the channel region being between the first and second ion doping regions, an average size of the grains in the channel region being greater than that of the grains in the first and second ion doping regions, a first gate electrode insulated from and overlapping the channel region, a second gate electrode insulated from the first gate electrode and overlapping the channel region, an inter-insulating layer on the second gate electrode, a source electrode on the inter-insulating layer and connected to the first ion doping region, and a drain electrode on the inter-insulating layer and connected to the second ion doping region.
摘要翻译： 一种晶体管，包括在基底衬底上的多晶硅层，并且包括沟道区，第一离子掺杂区，第二离子掺杂区，沟道区在第一和第二离子掺杂区之间，沟道中的晶粒的平均尺寸 区域大于第一和第二离子掺杂区域中的晶粒的区域，与沟道区域绝缘并且与沟道区域重叠的第一栅极电极，与第一栅电极绝缘并与沟道区域重叠的第二栅极电极，绝缘层 在所述第二栅电极上，在所述绝缘层上并连接到所述第一离子掺杂区的源电极和所述绝缘层上的漏极连接到所述第二离子掺杂区。
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公开(公告)号：US11751441B2
公开(公告)日：2023-09-05
申请号：US17332698
申请日：2021-05-27
发明人： Eunhyun Kim , Eunhye Ko , Yeonhong Kim , Kyoungwon Lee , Sunhee Lee , Junhyung Lim
IPC分类号： H10K59/126 , H10K59/131 , H10K77/10 , H10K102/00
CPC分类号： H10K59/126 , H10K59/131 , H10K77/111 , H10K2102/311
摘要： A display apparatus in which an area of a peripheral area may be reduced while having a simple structure, the display apparatus includes a substrate, a bottom metal layer on the substrate and including a first extension line extending from the peripheral area outside a display area into the display area, a semiconductor layer on the bottom metal layer, a gate layer on the semiconductor layer, a first metal layer on the gate layer, and a second metal layer on the first metal layer and including a first data line extending from the peripheral area into the display area and electrically coupled to the first extension line in the peripheral area.
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