公开(公告)号：US20150206487A1

公开(公告)日：2015-07-23

申请号：US14462064

申请日：2014-08-18

Applicant: SAMSUNG DISPLAY CO., LTD.

Inventor： Yunmi KIM ,  Kihyun PYUN ,  Sung-Jun KIM ,  Kyung-Hwa LIM ,  Juhyun KIM ,  Yongjae LEE ,  Jeongdoo LEE

IPC: G09G3/36

CPC classification number: G09G3/3614 ,  G09G3/3696 ,  G09G2310/08 ,  G09G2320/0209

Abstract: A display apparatus includes: a display panel which displays an image; a data driver which supplies a data voltage to the display panel in response to a polarity control signal, where the polarity control signal controls a polarity of the data voltage; a timing controller which outputs a polarity signal corresponding to a polarity of the data voltage; and a polarity converter which receives a common voltage from a common electrode of the display panel and the polarity signal from the timing controller, where the polarity converter outputs the polarity control signal to the data driver in response to a difference in voltage level between the common voltage from the common electrode and the polarity signal from the timing controller.

Abstract translation: 显示装置包括：显示面板，显示图像; 数据驱动器，其响应于极性控制信号向显示面板提供数据电压，其中极性控制信号控制数据电压的极性; 定时控制器，其输出与数据电压的极性对应的极性信号; 以及极性转换器，其接收来自显示面板的公共电极的公共电压和来自时序控制器的极性信号，其中极性转换器响应于公共电压之间的电压电平的差异将极性控制信号输出到数据驱动器 来自公共电极的电压和来自定时控制器的极性信号。

公开(公告)号：US20150091883A1

公开(公告)日：2015-04-02

申请号：US14161521

申请日：2014-01-22

Applicant: Samsung Display Co., Ltd.

Inventor： Ki Hyun PYUN ,  Yun Mi KIM ,  Min Young PARK ,  Sung-Jun KIM ,  Ju Hyun KIM ,  Yong Jae LEE ,  Kyung-Hwa LIM

IPC: G09G3/34

CPC classification number: G09G3/2074 ,  G09G3/3614 ,  G09G3/3677 ,  G09G2310/0289 ,  G09G2320/0252

Abstract: A method of reducing a time for switching a gate line driving signal of display device having plural gate lines from a level that is less than a full gate-on level to the gate-on level is disclosed. The method may include: during a gate line pre-charging period of a respective gate line, causing the gate line driving signal to be at the full gate-on level; during a corresponding gate line main-charging period that follows the pre-charging period, causing the gate line driving signal of to be at the full gate-on level; and during an interposed period that is interposed between the gate line pre-charging period and its corresponding gate line main-charging period, causing the gate line driving signal to be at an intermediate level that is between the full gate-on level and an opposed gate-off level.

Abstract translation: 公开了一种减少将具有多个栅极线的显示装置的栅极线驱动信号从小于全栅极导通电平的电平切换到栅极导通电平的方法。 该方法可以包括：在相应栅极线的栅极线预充电周期期间，使栅极线驱动信号处于完全栅极导通电平; 在预充电周期之后的相应的栅极线主充电期间，使栅极线驱动信号处于全栅极导通电平; 并且在插入在栅极线预充电周期与其对应的栅极线主充电周期之间的插入时段期间，使栅极线驱动信号处于处于完全栅极导通电平之间的中间电平， 关门水平

公开(公告)号：US20190244580A1

公开(公告)日：2019-08-08

申请号：US16263257

申请日：2019-01-31

Applicant: Samsung Display Co., Ltd.

Inventor： Sangan KWON ,  Junpyo LEE ,  Kyunho KIM ,  Sungjin KIM ,  Yong-Jin SHIN ,  Neung-Beom LEE ,  Kyung-Hwa LIM ,  Jinhyuk JANG

IPC: G09G3/36 ,  G02F1/1362 ,  G02F1/1368 ,  G09G3/34

CPC classification number: G09G3/3696 ,  G02F1/136213 ,  G02F1/1368 ,  G02F2201/121 ,  G02F2201/123 ,  G09G3/3406 ,  G09G3/3677 ,  G09G3/3688 ,  G09G2300/0819 ,  G09G2310/08 ,  G09G2320/045 ,  G09G2320/048

Abstract: A method of driving a liquid crystal display panel is provided. The liquid crystal display panel includes: a liquid crystal display pixel including a liquid crystal structure including a pixel electrode, a liquid crystal layer, and a common electrode; a switching transistor connected between the pixel electrode of the liquid crystal structure and a data-line; and a storage capacitor connected to the pixel electrode of the liquid crystal structure. The method includes: calculating an accumulated driving time of the liquid crystal display panel by accumulating a driving time of the liquid crystal display panel; determining whether or not the accumulated driving time has reached a deterioration reference time; and when the accumulated driving time is determined to have reached the deterioration reference time, changing a gate-off voltage applied to a gate terminal of the switching transistor and a common voltage applied to the common electrode.

公开(公告)号：US20140347341A1

公开(公告)日：2014-11-27

申请号：US14095900

申请日：2013-12-03

Applicant: Samsung Display Co., Ltd.

Inventor： Kihyun PYUN ,  Yunmi KIM ,  Minyoung PARK ,  Kyung-Hwa LIM

IPC: G09G3/36

CPC classification number: G09G3/3696 ,  G09G3/3677 ,  G09G2310/0289 ,  G09G2320/0219 ,  G09G2320/041

Abstract: A display apparatus is provided which includes a display panel; a gate driver configured to drive a plurality of gate lines, a data driver configured to drive a plurality of data lines, a level shifter configured to generate a gate on voltage corresponding to an atmospheric temperature and to generate a gate clock signal, the gate on voltage becoming higher depending on a decrease in an atmospheric temperature, and a timing controller configured to control the gate driver and the data driver and to generate agate pulse signal having a pulse width corresponding to a voltage level of the gate on voltage.

Abstract translation: 提供一种显示装置，其包括显示面板; 配置为驱动多条栅极线的栅极驱动器，被配置为驱动多条数据线的数据驱动器，配置为产生对应于大气温度的栅极导通电压并产生栅极时钟信号的电平移位器，栅极导通 电压根据大气温度的降低而变高，以及定时控制器，被配置为控制栅极驱动器和数据驱动器，并且生成具有对应于栅极导通电压的电压电平的脉冲宽度的玛瑙脉冲信号。