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公开(公告)号：US20160293094A1
公开(公告)日：2016-10-06
申请号：US15048979
申请日：2016-02-19
发明人： Jun Hyun PARK , Sung Hwan KIM , Se Young SONG , Kyoung Ju SHIN
IPC分类号： G09G3/20 , H03K17/687
CPC分类号： H03K17/6871 , G09G3/20 , G09G2310/0267 , G09G2310/0286 , G11C19/184 , G11C19/28
摘要： A gate driving circuit includes: a plurality of stages configured to output a plurality of gate signals, wherein an Nth stage of the plurality of stages includes: an output pull-up unit including a control electrode connected to a first node, wherein the output pull-up unit is configured to increase an electric potential at the first node and is further configured to receive a clock signal and to output a gate signal of the Nth stage; a control node pull-up unit configured to charge the first node according to an (N−1)th control signal and an (N−2)th control signal; a control node pull-down unit configured to discharge a voltage of the first node as a first low voltage according to an (N+1)th control signal; and an output pull-down unit configured to discharge a gate signal of the Nth stage as the first low voltage according to the (N+1)th control signal.
摘要翻译： 栅极驱动电路包括：多个级，被配置为输出多个栅极信号，其中所述多个级的第N级包括：输出上拉单元，包括连接到第一节点的控制电极，其中所述输出拉 所述单元被配置为增加所述第一节点处的电位，并且还被配置为接收时钟信号并输出所述第N级的门信号; 控制节点上拉单元，被配置为根据第（N-1）个控制信号和第（N-2）个控制信号对所述第一节点充电; 控制节点下拉单元，被配置为根据第（N + 1）个控制信号将第一节点的电压作为第一低电压放电; 以及输出下拉单元，被配置为根据第（N + 1）个控制信号，将第N级的栅极信号作为第一低电压放电。
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公开(公告)号：US20170025447A1
公开(公告)日：2017-01-26
申请号：US14995675
申请日：2016-01-14
发明人： Jun Hyun PARK , Sung Hwan KIM , Se Young SONG , Kyoung Ju SHIN
CPC分类号： H01L27/1255 , H01L27/1222 , H01L27/1225 , H01L27/124 , H01L27/1248 , H01L27/1259 , H01L28/60
摘要： A display device includes a substrate, a thin film transistor, a storage electrode, a pixel electrode, and a common electrode. The thin film transistor is disposed on the substrate and includes a drain electrode and a semiconductor layer. The storage electrode is disposed at a same layer as the semiconductor layer. The pixel electrode is disposed on the substrate and is electrically connected to the drain electrode. The common electrode is disposed on the substrate.
摘要翻译： 显示装置包括基板，薄膜晶体管，存储电极，像素电极和公共电极。 薄膜晶体管设置在基板上，并且包括漏电极和半导体层。 存储电极设置在与半导体层相同的层。 像素电极设置在基板上并与漏电极电连接。 公共电极设置在基板上。
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公开(公告)号：US20160223873A1
公开(公告)日：2016-08-04
申请号：US15000633
申请日：2016-01-19
发明人： Kyoung Ju SHIN , Sung Hwan KIM , Se Young SONG
IPC分类号： G02F1/1343 , G02F1/1335 , G02F1/1362
CPC分类号： G02F1/133345 , G02F1/133512 , G02F1/134309 , G02F1/134363 , G02F1/13439 , G02F1/136213 , G02F1/136227 , G02F1/1368 , G02F2001/134372
摘要： A liquid crystal display including: a first substrate; a gate line and a data line formed or otherwise disposed on the first substrate; a drain electrode disposed on the first substrate; a first insulating layer disposed on the gate line and the data line; a first electrode disposed on the first insulating layer; a second insulating layer disposed on the first electrode; and a second electrode disposed on the second insulating layer. The first insulating layer and the second insulating layer have a first contact hole exposing a portion of the drain electrode. The contact portion of the second electrode is connected to the drain electrode through the first contact hole, and the contact portion overlaps the first electrode adjacent the first contact hole. The overlap increases capacitance of the display panel so as to decrease kickback voltage and reduce flicker.
摘要翻译： 一种液晶显示器，包括：第一基板; 形成或以其他方式设置在第一基板上的栅极线和数据线; 设置在所述第一基板上的漏电极; 设置在栅极线和数据线上的第一绝缘层; 设置在所述第一绝缘层上的第一电极; 设置在所述第一电极上的第二绝缘层; 以及设置在所述第二绝缘层上的第二电极。 第一绝缘层和第二绝缘层具有暴露漏电极的一部分的第一接触孔。 第二电极的接触部分通过第一接触孔连接到漏电极，接触部分与第一接触孔相邻的第一电极重叠。 重叠增加了显示面板的电容，从而降低反冲电压并减少闪烁。
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公开(公告)号：US20160307537A1
公开(公告)日：2016-10-20
申请号：US15042029
申请日：2016-02-11
发明人： Jun Hyun PARK , Sung Hwan KIM , Se Young SONG , Kyoung Ju SHIN , Jae Keun LIM
IPC分类号： G09G3/36 , H03K17/687
CPC分类号： G09G3/3677 , G09G3/20 , G09G2300/0465 , G09G2310/0267 , G09G2310/0286 , G09G2310/0289 , G11C19/28 , H03K17/6871
摘要： There is provided a stage circuit capable of minimizing a mounting area. The stage circuit includes: an output unit configured to supply a voltage of a first node, an i-th (i is a natural number) carry signal, and to supply an i-th scan signal in response to the voltage of the first node, a voltage of a second node, and a first clock signal, a controller configured to control the voltage of the second node in response to the first clock signal; a pull-up unit configured to control the voltage of the first node in response to a carry signal of a previous stage and a voltage of a first node of the previous stage, and a pull-down unit configured to control the voltage of the first node in response to the voltage of the second node and a carry signal of a next stage.
摘要翻译： 提供能够最小化安装面积的平台电路。 舞台电路包括：输出单元，被配置为提供第一节点的电压，第i（i是自然数）进位信号，并且响应于第一节点的电压提供第i个扫描信号 ，第二节点的电压和第一时钟信号，被配置为响应于第一时钟信号来控制第二节点的电压的控制器; 上拉单元，被配置为响应于前一级的进位信号和前一级的第一节点的电压来控制第一节点的电压;以及下拉单元，被配置为控制第一节点的电压 响应于第二节点的电压和下一级的进位信号。
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公开(公告)号：US20150255026A1
公开(公告)日：2015-09-10
申请号：US14639749
申请日：2015-03-05
发明人： Kwang-Chul JUNG , Se Young SONG , Sung-Jin HONG , Jae Byung PARK , Mee Hye JUNG , Hyun Min CHO
IPC分类号： G09G3/36 , G02F1/1362 , G02F1/1368
CPC分类号： G02F1/13624 , G02F1/1368 , G02F2001/134345 , G09G3/3614 , G09G3/3648 , G09G2300/0447 , G09G2300/0814
摘要： A display device is disclosed. In one aspect, the display device includes a plurality of pixels each including first and second switching elements connected to a first gate line and a data line. Each pixel also includes a first memory capacitor connected to the first switching element and a capacitance voltage line, a second memory capacitor connected to the second switching element and the capacitance voltage line, and a third switching element and a fourth switching element each connected to a second gate line and a reference voltage line. Each pixel further includes a fifth switching element connected to a third gate line and the first memory capacitor, a sixth switching element connected to the third gate line and the second memory capacitor, a first subpixel electrode connected to the third and fifth switching elements, and a second subpixel electrode connected to the fourth and sixth switching element.
摘要翻译： 公开了一种显示装置。 一方面，显示装置包括多个像素，每个像素包括连接到第一栅极线和数据线的第一和第二开关元件。 每个像素还包括连接到第一开关元件和电容电压线的第一存储器电容器，连接到第二开关元件和电容电压线的第二存储电容器，以及连接到第一开关元件的第三开关元件和第四开关元件 第二栅极线和参考电压线。 每个像素还包括连接到第三栅极线和第一存储电容器的第五开关元件，连接到第三栅极线和第二存储电容器的第六开关元件，连接到第三和第五开关元件的第一子像素电极，以及 连接到第四和第六开关元件的第二子像素电极。
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公开(公告)号：US20150221260A1
公开(公告)日：2015-08-06
申请号：US14337862
申请日：2014-07-22
发明人： Jae Hyun CHO , Jae Byung PARK , Se Young SONG , Seon-Tae YOON , Hyun Min CHO , Sung-Jin HONG
CPC分类号： G09G3/3413 , G09G3/2003 , G09G3/3648 , G09G2300/0452 , G09G2310/0232 , G09G2310/0235 , G09G2310/0237 , G09G2320/0228 , G09G2320/0242
摘要： A display device includes: a display panel configured with rows of pixels, each row pixels including a first color pixel, a second color pixel, and a third color pixel; and a backlight assembly configured to supply light to the display panel, in which: a data signal is alternately applied to a first color pixel disposed in an odd row on an odd frame, and to another first color pixel disposed in an even row on an even frame, a data signal is alternately applied to a second color pixel disposed in the odd row on the odd frame, and to another second color pixel disposed in the even row on the even frame, a data signal is applied to a third color pixel on both frames, and colors of light supplied to the display panel on the odd frame and the even frame are different from each other.
摘要翻译： 显示装置包括：配置有行像素的显示面板，每行像素包括第一彩色像素，第二彩色像素和第三彩色像素; 以及配置为向显示面板供给光的背光组件，其中：数据信号被交替地施加到布置在奇数帧上的奇数行中的第一颜色像素，以及布置在偶数行上的另一个第一颜色像素 偶数帧，将数据信号交替地施加到布置在奇数帧上的奇数行中的第二彩色像素，以及布置在偶数帧上的偶数行中的另一个第二颜色像素，数据信号被施加到第三颜色像素 并且在奇数帧和偶数帧上提供给显示面板的光的颜色彼此不同。
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