DISPLAY DEVICE AND METHOD OF FABRICATING THE SAME

    公开(公告)号:US20210036076A1

    公开(公告)日:2021-02-04

    申请号:US16895756

    申请日:2020-06-08

    Abstract: A display device includes a substrate having a display area and a pad area. A gate conductive layer disposed on the substrate includes a gate conductive metal layer and a gate capping layer. The gate conductive layer forms a gate electrode in the display area and a wire pad in the pad area that is exposed by a pad opening. An interlayer insulating film disposed on the gate conductive layer covers the gate electrode. A data conductive layer disposed on the interlayer insulating film in the display area includes source and drain electrodes. A passivation layer disposed on the data conductive layer covers the source and drain electrodes. A via layer is disposed on the passivation layer. A pixel electrode is disposed on the via layer. The pixel electrode is connected to the source electrode through a contact hole penetrating the via layer and the passivation layer.

    DISPLAY DEVICE
    3.
    发明申请

    公开(公告)号:US20210091163A1

    公开(公告)日:2021-03-25

    申请号:US16892988

    申请日:2020-06-04

    Abstract: A display device includes a substrate, a first conductive layer on the substrate, the first conductive layer including a data signal line, a first insulating layer on the first conductive layer, a semiconductor layer on the first insulating layer, the semiconductor layer including a first semiconductor pattern, a second insulating layer on the semiconductor layer, and a second conductive layer on the second insulating layer, the second conductive layer including a gate electrode disposed to overlap the first semiconductor pattern, a transistor first electrode disposed to overlap a part of the first semiconductor pattern, wherein the transistor first electrode is electrically connected to the data signal line through a contact hole that penetrates the first and second insulating layers, and a transistor second electrode disposed to overlap another part of the first semiconductor pattern.

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