Thin film transistor, thin film transistor array panel, and manufacturing method of thin film transistor
    1.
    发明授权
    Thin film transistor, thin film transistor array panel, and manufacturing method of thin film transistor 有权
    薄膜晶体管,薄膜晶体管阵列面板以及薄膜晶体管的制造方法

    公开(公告)号:US09553201B2

    公开(公告)日:2017-01-24

    申请号:US14179452

    申请日:2014-02-12

    CPC classification number: H01L29/7869 H01L29/78696

    Abstract: The inventive concept relates to a thin film transistor and a thin film transistor array panel and, in detail, relates to a thin film transistor including an oxide semiconductor. A thin film transistor according to an exemplary embodiment of the inventive concept includes: a gate electrode; a gate insulating layer positioned on or under the gate electrode; a first semiconductor and a second semiconductor that overlap the gate electrode with the gate insulating layer interposed therebetween, the first semiconductor and the second semiconductor contacting each other; a source electrode connected to the second semiconductor; and a drain electrode connected to the second semiconductor and facing the source electrode, wherein the second semiconductor includes gallium (Ga) that is not included in the first semiconductor, and a content of gallium (Ga) in the second semiconductor is greater than 0 at. % and less than or equal to about 33 at. %.

    Abstract translation: 本发明构思涉及薄膜晶体管和薄膜晶体管阵列面板,并且详细地涉及包括氧化物半导体的薄膜晶体管。 根据本发明构思的示例性实施例的薄膜晶体管包括:栅电极; 位于栅极电极上或下方的栅极绝缘层; 第一半导体和第二半导体,其与栅电极重叠,栅极绝缘层插入其间,第一半导体和第二半导体彼此接触; 连接到所述第二半导体的源电极; 和连接到第二半导体并面向源电极的漏电极,其中第二半导体包括不包括在第一半导体中的镓(Ga),并且第二半导体中的镓(Ga)的含量大于0 。 %且小于或等于约33at。 %。

    Display device and manufacturing method thereof
    2.
    发明授权
    Display device and manufacturing method thereof 有权
    显示装置及其制造方法

    公开(公告)号:US09099360B2

    公开(公告)日:2015-08-04

    申请号:US14334525

    申请日:2014-07-17

    Abstract: A display device and a manufacturing method thereof with improved performance and low manufacturing complexity are provided. One inventive aspect includes: a first control electrode, a semiconductor layer, an etch stop layer, a first input electrode and a first output electrode, a third control electrode, a passivation layer and a pixel electrode. The third control electrode is formed on the etch stop layer. The passivation layer is formed on the first electrode, the first output electrode and the third control electrode. The pixel electrode is formed on the passivation layer and connects to the first output electrode.

    Abstract translation: 提供了具有改进的性能和低制造复杂度的显示装置及其制造方法。 本发明的一个方面包括:第一控制电极,半导体层,蚀刻停止层,第一输入电极和第一输出电极,第三控制电极,钝化层和像素电极。 第三控制电极形成在蚀刻停止层上。 钝化层形成在第一电极,第一输出电极和第三控制电极上。 像素电极形成在钝化层上并连接到第一输出电极。

    DISPLAY DEVICE AND MANUFACTURING METHOD THEREOF
    8.
    发明申请
    DISPLAY DEVICE AND MANUFACTURING METHOD THEREOF 有权
    显示装置及其制造方法

    公开(公告)号:US20150115257A1

    公开(公告)日:2015-04-30

    申请号:US14334525

    申请日:2014-07-17

    Abstract: A display device and a manufacturing method thereof with improved performance and low manufacturing complexity are provided. One inventive aspect includes: a first control electrode, a semiconductor layer, an etch stop layer, a first input electrode and a first output electrode, a third control electrode, a passivation layer and a pixel electrode. The third control electrode is formed on the etch stop layer. The passivation layer is formed on the first electrode, the first output electrode and the third control electrode. The pixel electrode is formed on the passivation layer and connects to the first output electrode.

    Abstract translation: 提供了具有改进的性能和低制造复杂度的显示装置及其制造方法。 本发明的一个方面包括:第一控制电极,半导体层,蚀刻停止层,第一输入电极和第一输出电极,第三控制电极,钝化层和像素电极。 第三控制电极形成在蚀刻停止层上。 钝化层形成在第一电极,第一输出电极和第三控制电极上。 像素电极形成在钝化层上并连接到第一输出电极。

Patent Agency Ranking