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公开(公告)号:US10535679B2
公开(公告)日:2020-01-14
申请号:US16136474
申请日:2018-09-20
发明人: Seok Cheon Baek , Boh Chang Kim , Chung Ki Min , Ji Hoon Park , Byung Kwan You
IPC分类号: H01L27/11582 , H01L29/423 , H01L23/00
摘要: A semiconductor device includes lower gate electrodes placed on a substrate and spaced apart from one another; upper gate electrodes placed over the lower gate electrodes and spaced apart from one another; an R-type pad extending from one end of at least one electrode among the lower gate electrodes or the upper gate electrodes and having a greater thickness than the lower gate electrode or upper gate electrode connected to the R-type pad; and a P-type pad extending from one end of at least one electrode to which the R-type pad is not connected among the lower gate electrodes or the upper gate electrodes and having a different thickness than the R-type pad, wherein the P-type pad includes a first pad connected to an uppermost lower gate electrode among the lower gate electrodes.
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公开(公告)号:US10553609B2
公开(公告)日:2020-02-04
申请号:US16149581
申请日:2018-10-02
发明人: Woong Seop Lee , Byung Kwan You , Jae Woo Kwak
IPC分类号: H01L27/11582 , H01L23/522 , H01L27/11519 , H01L27/11556 , H01L21/768 , H01L27/11565 , H01L21/3213 , H01L27/11526 , H01L27/11573 , H01L21/311
摘要: A semiconductor device includes a substrate, a first gate structure including first gate electrodes that are vertically stacked on the substrate, first channels penetrating the first gate structure to contact the substrate, a second gate structure including a channel connection layer on the first gate structure and second gate electrodes on the channel connection layer, second channels penetrating the second gate structure to contact the first channels, respectively, and separation regions penetrating the second gate structure and the first gate structure and extending in a first direction. The second gate electrodes are vertically stacked on the channel connection layer. The channel connection layer is between the separation regions and has at least one sidewall that is spaced apart from sidewalls of the separation regions.
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公开(公告)号:US20190237476A1
公开(公告)日:2019-08-01
申请号:US16149581
申请日:2018-10-02
发明人: Woong Seop Lee , Byung Kwan You , Jae Woo Kwak
IPC分类号: H01L27/11582 , H01L23/522 , H01L27/11519 , H01L27/11556 , H01L27/11565 , H01L21/768
摘要: A semiconductor device includes a substrate, a first gate structure including first gate electrodes that are vertically stacked on the substrate, first channels penetrating the first gate structure to contact the substrate, a second gate structure including a channel connection layer on the first gate structure and second gate electrodes on the channel connection layer, second channels penetrating the second gate structure to contact the first channels, respectively, and separation regions penetrating the second gate structure and the first gate structure and extending in a first direction. The second gate electrodes are vertically stacked on the channel connection layer. The channel connection layer is between the separation regions and has at least one sidewall that is spaced apart from sidewalls of the separation regions.
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4.
公开(公告)号:US11145672B2
公开(公告)日:2021-10-12
申请号:US16706684
申请日:2019-12-07
发明人: Seok Cheon Baek , Boh Chang Kim , Chung Ki Min , Ji Hoon Park , Byung Kwan You
IPC分类号: H01L27/11582 , H01L23/00 , H01L29/423 , H01L27/11565 , H01L27/11548 , H01L27/11575 , H01L27/11556 , H01L27/1157 , H01L21/768 , H01L23/538 , H01L27/11531
摘要: A semiconductor device includes lower gate electrodes placed on a substrate and spaced apart from one another; upper gate electrodes placed over the lower gate electrodes and spaced apart from one another; an R-type pad extending from one end of at least one electrode among the lower gate electrodes or the upper gate electrodes and having a greater thickness than the lower gate electrode or upper gate electrode connected to the R-type pad; and a P-type pad extending from one end of at least one electrode to which the R-type pad is not connected among the lower gate electrodes or the upper gate electrodes and having a different thickness than the R-type pad, wherein the P-type pad includes a first pad connected to an uppermost lower gate electrode among the lower gate electrodes.
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