公开(公告)号：US12181950B2

公开(公告)日：2024-12-31

申请号：US17943857

申请日：2022-09-13

Applicant: SAMSUNG ELECTRONICS CO., LTD.

Inventor： Byungchul Jeon ,  Jae Min Kim ,  Hyunseok Kim ,  Junho Huh

IPC: G06F1/00 ,  G06F1/3287 ,  G06F1/3296 ,  H03K17/687

Abstract: A system on chip (SoC) includes a first core and a second core, first and second power gating switches, and a first power switch. The first power gating switch is arranged between the first core and a first power rail that receives a first voltage, and is selectively turned on in response to a first power gating signal. The second power gating switch is arranged between the second core and a second power rail that receives a second voltage, and is selectively turned on in response to a second power gating signal. The first power switch is arranged between the first power rail and the second power rail, and is selectively turned on in response to a first power control signal to connect the first power gating switch or the second power gating switch both the first power rail and the second power rail.

公开(公告)号：US20210042157A1

公开(公告)日：2021-02-11

申请号：US16789602

申请日：2020-02-13

Applicant: Samsung Electronics Co., Ltd.

Inventor： Jaemin Kim ,  Byungchul Jeon ,  Junho Huh

IPC: G06F9/48 ,  G06F11/30 ,  G06F11/34 ,  G06F1/3287 ,  G06F9/50

Abstract: In a method of operating a multi-core system comprising a plurality of processor cores, a plurality of task stall information respectively corresponding to a plurality of tasks are provided by monitoring a task stall time with respect to each task. The task stall time indicates a time while the each task is suspended within a task active time, and the task active time indicates a time while a corresponding processor core is occupied by the each task. Task scheduling is performed based on the plurality of task stall information, and a fine-grained dynamic voltage and frequency scaling (DVFS) is performed based on the task scheduling. The plurality of tasks may be assigned to the plurality of processor cores based on load unbalancing, and the effects of the fine-grained DVFS may be increased to reduce the power consumption of the multi-core system.

公开(公告)号：US11734067B2

公开(公告)日：2023-08-22

申请号：US16789602

申请日：2020-02-13

Applicant: Samsung Electronics Co., Ltd.

Inventor： Jae Min Kim ,  Byungchul Jeon ,  Junho Huh

IPC: G06F9/48 ,  G06F9/50 ,  G06F1/3287 ,  G06F11/30 ,  G06F11/34

CPC classification number: G06F9/4893 ,  G06F1/3287 ,  G06F9/505 ,  G06F11/3024 ,  G06F11/3423 ,  G06F2209/486

Abstract: In a method of operating a multi-core system comprising a plurality of processor cores, a plurality of task stall information respectively corresponding to a plurality of tasks are provided by monitoring a task stall time with respect to each task. The task stall time indicates a time while the each task is suspended within a task active time, and the task active time indicates a time while a corresponding processor core is occupied by the each task. Task scheduling is performed based on the plurality of task stall information, and a fine-grained dynamic voltage and frequency scaling (DVFS) is performed based on the task scheduling. The plurality of tasks may be assigned to the plurality of processor cores based on load unbalancing, and the effects of the fine-grained DVFS may be increased to reduce the power consumption of the multi-core system.

公开(公告)号：US20210034138A1

公开(公告)日：2021-02-04

申请号：US16845661

申请日：2020-04-10

Applicant: SAMSUNG ELECTRONICS CO., LTD.

Inventor： Byungchul Jeon ,  Jae Min Kim ,  Hyunseok Kim ,  Junho Huh

IPC: G06F1/3287 ,  H03K17/687 ,  G06F1/3296

Abstract: A system on chip (SoC) includes a first core and a second core, first and second power gating switches, and a first power switch. The first power gating switch is arranged between the first core and a first power rail that receives a first voltage, and is selectively turned on in response to a first power gating signal. The second power gating switch is arranged between the second core and a second power rail that receives a second voltage, and is selectively turned on in response to a second power gating signal. The first power switch is arranged between the first power rail and the second power rail, and is selectively turned on in response to a first power control signal to connect the first power gating switch or the second power gating switch both the first power rail and the second power rail.

公开(公告)号：US11537154B2

公开(公告)日：2022-12-27

申请号：US17460389

申请日：2021-08-30

Applicant: SAMSUNG ELECTRONICS CO., LTD.

Inventor： Kyoungmin Lee ,  Changsoo Kim ,  Byungchul Jeon ,  Junghun Heo ,  Junho Huh

IPC: G05F1/56 ,  H02M1/00 ,  H02M3/04 ,  H05K1/18

Abstract: A mobile device includes; a PCB including a first side and a second side, a PMIC generating power supply voltages and mounted on the second side of the PCB, a package substrate mounted on the first side of PCB using first interconnects, an IC mounted on the first side of the package substrate, LDO regulators mounted on the second side of the package substrate and disposed between the first interconnects, and high density capacitors disposed between each of the LDO regulators and the second side of the package substrate, wherein the PCB includes first electrical paths connecting the PMIC to the LDO regulators, and the package substrate includes second electrical paths connecting the LDO regulators to the IC.

公开(公告)号：US11467652B2

公开(公告)日：2022-10-11

申请号：US16845661

申请日：2020-04-10

Applicant: SAMSUNG ELECTRONICS CO., LTD.

Inventor： Byungchul Jeon ,  Jae Min Kim ,  Hyunseok Kim ,  Junho Huh

IPC: G06F1/00 ,  G06F1/3287 ,  G06F1/3296 ,  H03K17/687

Abstract: A system on chip (SoC) includes a first core and a second core, first and second power gating switches, and a first power switch. The first power gating switch is arranged between the first core and a first power rail that receives a first voltage, and is selectively turned on in response to a first power gating signal. The second power gating switch is arranged between the second core and a second power rail that receives a second voltage, and is selectively turned on in response to a second power gating signal. The first power switch is arranged between the first power rail and the second power rail, and is selectively turned on in response to a first power control signal to connect the first power gating switch or the second power gating switch both the first power rail and the second power rail.

公开(公告)号：US11146161B2

公开(公告)日：2021-10-12

申请号：US15931798

申请日：2020-05-14

Applicant: Samsung Electronics Co., Ltd.

Inventor： Byungchul Jeon ,  Hyunseok Kim ,  Junho Huh ,  Jaemin Kim

IPC: H02M1/00 ,  H02M3/158

Abstract: An electronic system includes a plurality of voltage regulators configured to convert an input voltage, a plurality of inductors respectively connected to the plurality of voltage regulators to respectively output a plurality of converting currents, and a switching unit configured to select at least one converting current from among the plurality of converting currents in response to a switching control signal and supply power to a load unit based on the selected at least one converting current.