公开(公告)号：US20240315055A1

公开(公告)日：2024-09-19

申请号：US18233296

申请日：2023-08-11

Applicant: Samsung Electronics Co., Ltd.

Inventor： Casey Glenn THIELEN ,  Douglas JOSEPH

IPC: H10B80/00 ,  H01L23/00 ,  H01L25/065

CPC classification number: H10B80/00 ,  H01L24/05 ,  H01L24/08 ,  H01L24/16 ,  H01L25/0652 ,  H01L2224/05647 ,  H01L2224/08145 ,  H01L2224/16145

Abstract: A memory solution device may include a logic die, a high-bandwidth memory, and a first memory die. The logic die may be a central processing unit or an accelerator, and may include a first surface. The high-bandwidth memory die may be located on the first surface at a first predetermined location. The first memory die may be located on the first surface at a second predetermined location that is different from the first predetermined location. The first memory die may be a read-only memory, a random access memory, a non-volatile memory, or a combination thereof.

公开(公告)号：US20240311323A1

公开(公告)日：2024-09-19

申请号：US18232819

申请日：2023-08-10

Applicant: Samsung Electronics Co., Ltd.

Inventor： Eric Richard BORCH ,  Casey Glenn THIELEN ,  Alan GARA ,  Young Jun HONG

IPC: G06F13/40 ,  G06F11/34

CPC classification number: G06F13/4022 ,  G06F11/3495

Abstract: Embodiments disclose methods, systems and devices including a plurality of connectors, a plurality of switches, and a plurality of compute elements. Each of the plurality of compute elements may be connected to each of the plurality of switches. In some embodiments, a first subset of the plurality of switches may be directly connected to a first subset of the plurality of the connectors in a fanout mechanism, and a second subset of the plurality of switches may be directly connected to a second subset of the plurality of the connectors in a similar fanout mechanism.