公开(公告)号：US20210134804A1

公开(公告)日：2021-05-06

申请号：US16897589

申请日：2020-06-10

Applicant: Samsung Electronics Co., Ltd.

Inventor： Kyooho JUNG ,  Younsoo KIM ,  Young-lim PARK ,  Jeong-Gyu SONG ,  Se Hyoung AHN ,  Changmu AN

IPC: H01L27/108 ,  H01L49/02 ,  H01L21/02

Abstract: Disclosed are semiconductor memory devices and methods of fabricating the same. The semiconductor memory device comprises a capacitor that includes a bottom electrode, a top electrode opposite to the bottom electrode across a dielectric layer, and an interface layer between the bottom electrode and the dielectric layer. The interface layer includes a combination of niobium (Nb), titanium (Ti), oxygen (O), and nitrogen (N), and further includes a constituent of the dielectric layer.

公开(公告)号：US20220085010A1

公开(公告)日：2022-03-17

申请号：US17361418

申请日：2021-06-29

Applicant: Samsung Electronics Co., Ltd.

Inventor： Kyooho JUNG ,  Young-Lim PARK ,  Changmu AN ,  Hongseon SONG ,  Yukyung SHIN

IPC: H01L27/08 ,  H01L49/02

Abstract: Disclosed are semiconductor devices and fabrication methods for the same. The semiconductor devices may include a bottom electrode, a dielectric layer, and a top electrode that are sequentially stacked on a semiconductor substrate. The bottom electrode includes a first doping region in contact with the dielectric layer, a main region spaced apart from the dielectric layer by the first doping region intervening therebetween, and a second doping region between the first doping region and the main region. Each of the first and second doping regions includes oxygen and a doping metal. In some embodiments, the second doping region may include nitrogen. The main region may be devoid of the doping metal. An amount of oxygen in the second doping region is less than an amount of oxygen in the first doping region.

公开(公告)号：US20210391333A1

公开(公告)日：2021-12-16

申请号：US17412801

申请日：2021-08-26

Applicant: Samsung Electronics Co., Ltd.

Inventor： Kyooho JUNG ,  Younsoo KIM ,  Young-Lim PARK ,  Jeong-Gyu SONG ,  Se Hyoung AHN ,  Changmu AN

IPC: H01L27/108 ,  H01L21/02 ,  H01L49/02

Abstract: Disclosed are semiconductor memory devices and methods of fabricating the same. The semiconductor memory device comprises a capacitor that includes a bottom electrode, a top electrode opposite to the bottom electrode across a dielectric layer, and an interface layer between the bottom electrode and the dielectric layer. The interface layer includes a combination of niobium (Nb), titanium (Ti), oxygen (O), and nitrogen (N), and further includes a constituent of the dielectric layer.