公开(公告)号：US20220011953A1

公开(公告)日：2022-01-13

申请号：US17013451

申请日：2020-09-04

Applicant: SAMSUNG ELECTRONICS CO., LTD.

Inventor： Xiang LIAN ,  Chao YANG

IPC: G06F3/06

Abstract: A provided a storage device configured to support a number of namespaces. The storage device includes a memory and a controller coupled to the memory. The controller includes a host interface layer and a flash translation layer configured to report to the host interface layer a first over-provisioning chunk from an over-provisioning pool and a first chunk separate from the over-provisioning pool. The controller is configured to receive a command at the host interface layer to utilize a portion of the memory for a first namespace from among the number of namespaces and the first namespace includes an unaligned chunk. The controller is configured to utilize the first over-provisioning chunk as the unaligned chunk of the first namespace. A number of over-provisioning chunks to be utilized as unaligned chunks is less than the number of namespaces.

公开(公告)号：US20210397456A1

公开(公告)日：2021-12-23

申请号：US17001674

申请日：2020-08-24

Applicant: Samsung Electronics Co., Ltd.

Inventor： Chao YANG ,  Wentao WU ,  Glenn YU ,  Wei ZHAO ,  Fnu VIKRAM SINGH ,  Xiaoyi ZHANG ,  Yong YANG

IPC: G06F9/38 ,  G06F9/30 ,  G06F11/30

Abstract: A method may include determining, with a queue availability module, that an entry is available in a queue, asserting a bit in a register based on determining that an entry is available in the queue, determining, with a processor, that the bit is asserted, and processing, with the processor, the entry in the queue based on determining that the bit is asserted. The method may further include storing the register in a tightly coupled memory associated with the processor. The method may further include storing the queue in the tightly coupled memory. The method may further include determining, with the queue availability module, that an entry is available in a second queue, and asserting a second bit in the register based on determining that an entry is available in the second queue. The method may further include finding the first bit in the register using a find first instruction.

公开(公告)号：US20240320010A1

公开(公告)日：2024-09-26

申请号：US18732604

申请日：2024-06-03

Applicant: Samsung Electronics Co., Ltd.

Inventor： Chao YANG ,  Wentao WU ,  Glenn YU ,  Wei ZHAO ,  FNU VIKRAM SINGH ,  Xiaoyi ZHANG ,  Yong YANG

IPC: G06F9/38 ,  G06F3/06 ,  G06F9/30 ,  G06F9/54 ,  G06F11/30

CPC classification number: G06F9/3856 ,  G06F3/0611 ,  G06F3/0659 ,  G06F3/0673 ,  G06F9/30018 ,  G06F9/3834 ,  G06F9/544 ,  G06F11/3051

Abstract: A method may include determining, with a queue availability module, that an entry is available in a queue, asserting a bit in a register based on determining that an entry is available in the queue, determining, with a processor, that the bit is asserted, and processing, with the processor, the entry in the queue based on determining that the bit is asserted. The method may further include storing the register in a tightly coupled memory associated with the processor. The method may further include storing the queue in the tightly coupled memory. The method may further include determining, with the queue availability module, that an entry is available in a second queue, and asserting a second bit in the register based on determining that an entry is available in the second queue. The method may further include finding the first bit in the register using a find first instruction.