公开(公告)号：US20230401009A1

公开(公告)日：2023-12-14

申请号：US18456770

申请日：2023-08-28

Applicant: Samsung Electronics Co., Ltd.

Inventor： Chun-chu Chen-Jhy Archie WU ,  Daniel Lee HELMICK ,  Fnu VIKRAM SINGH ,  Syed KAISER ,  Vasili ZHDANKIN ,  Yong YANG

IPC: G06F3/06 ,  G06F12/02 ,  G06F13/16

CPC classification number: G06F3/0659 ,  G06F3/0604 ,  G06F3/0656 ,  G06F3/0679 ,  G06F12/0246 ,  G06F13/1626 ,  G06F13/1642 ,  G06F13/1621

Abstract: A method and a memory device are provided. A controller of the memory device retrieves a first command from a host memory. The controller stores a first identifier of the first command in a set-aside buffer of the memory device. The controller retrieves a second command from the host memory. The controller initiates processing of the first command and the second command based on a second identifier of the second command corresponding to the first identifier

公开(公告)号：US20220357887A1

公开(公告)日：2022-11-10

申请号：US17381795

申请日：2021-07-21

Applicant: Samsung Electronics Co., Ltd.

Inventor： Chun-chu Chen-Jhy Archie WU ,  Daniel Lee HELMICK ,  Fnu VIKRAM SINGH ,  Syed KAISER ,  Vasili ZHDANKIN ,  Yong YANG

IPC: G06F3/06

Abstract: A method and a memory device are provided. A controller of the memory device retrieves a first command burst from a host memory. The first command burst includes a sequence of one or more commands from a first submission queue. The controller identifies that at least one command in the first command burst is at least one first fused command of a first set of fused commands. The first set of fused commands is to be processed atomically in the memory device, and a remainder of the first set of fused commands is on the first submission queue. The controller stores at least an identifier of the at least one first fused command in a set-aside buffer of the memory device.

公开(公告)号：US20210397456A1

公开(公告)日：2021-12-23

申请号：US17001674

申请日：2020-08-24

Applicant: Samsung Electronics Co., Ltd.

Inventor： Chao YANG ,  Wentao WU ,  Glenn YU ,  Wei ZHAO ,  Fnu VIKRAM SINGH ,  Xiaoyi ZHANG ,  Yong YANG

IPC: G06F9/38 ,  G06F9/30 ,  G06F11/30

Abstract: A method may include determining, with a queue availability module, that an entry is available in a queue, asserting a bit in a register based on determining that an entry is available in the queue, determining, with a processor, that the bit is asserted, and processing, with the processor, the entry in the queue based on determining that the bit is asserted. The method may further include storing the register in a tightly coupled memory associated with the processor. The method may further include storing the queue in the tightly coupled memory. The method may further include determining, with the queue availability module, that an entry is available in a second queue, and asserting a second bit in the register based on determining that an entry is available in the second queue. The method may further include finding the first bit in the register using a find first instruction.

公开(公告)号：US20220164300A1

公开(公告)日：2022-05-26

申请号：US17315191

申请日：2021-05-07

Applicant: Samsung Electronics Co., Ltd.

Inventor： Chun-Chu Chen-Jhy Archie WU ,  Fnu VIKRAM SINGH ,  Syed KAISER

IPC: G06F13/16 ,  G06F12/02

Abstract: A method of a buffer memory device, a storage system, and a buffer memory device are provided. The method of the buffer memory device, the buffer memory device having a lower tier memory and a higher tier memory, may include receiving a new entry request, determining that the new entry request includes an HOL entry, selecting an entry on the higher tier memory to be tiered down to the lower tier memory in response to determining that the new entry request includes an HOL entry, removing the selected entry from the higher tier memory, storing the HOL entry in the higher tier memory of the buffer memory device, and outputting the HOL entry to an arbiter.

公开(公告)号：US20220035530A1

公开(公告)日：2022-02-03

申请号：US17062467

申请日：2020-10-02

Applicant: SAMSUNG ELECTRONICS CO., LTD.

Inventor： Fnu VIKRAM SINGH

IPC: G06F3/06

Abstract: Systems and methods for processing copy commands are disclosed. A first controller of the storage device receives a copy command from a host via a first queue. The storage device generates, based on the copy command, a read command and a write command, and submits the read and write commands to a second controller of the storage device via a second queue. The second controller retrieves and processes the read and write commands from the second queue. The storage device reads, based on the processing of the read command, data stored in a first location of a storage media associated with a source address, and writes the data to a second location of the storage media associated with a destination address. The first controller transmits a signal to the host for indicating completion of the copy command.