Digital duty cycle correction circuit
    1.
    发明授权
    Digital duty cycle correction circuit 有权
    数字占空比校正电路

    公开(公告)号:US09071237B2

    公开(公告)日:2015-06-30

    申请号:US14207751

    申请日:2014-03-13

    CPC classification number: H03K5/1565

    Abstract: A digital duty cycle correction circuit includes a duty cycle controller and a digital duty control code generator. The duty cycle controller generates first and second output clock signals by compensating duty cycles of first and second input clock signals based on a digital duty control code. The digital duty control code generator generates the digital duty control code based on a frequency value obtained by converting duty cycle information of the first output clock signal and the second output clock signal.

    Abstract translation: 数字占空比校正电路包括占空比控制器和数字占空比控制代码发生器。 占空比控制器通过基于数字占空比控制代码补偿第一和第二输入时钟信号的占空比来产生第一和第二输出时钟信号。 数字占空比控制码发生器基于通过转换第一输出时钟信号和第二输出时钟信号的占空比信息而获得的频率值来生成数字占空比控制码。

    Semiconductor device compensating for internal skew and operating method thereof
    2.
    发明授权
    Semiconductor device compensating for internal skew and operating method thereof 有权
    补偿内部偏斜的半导体器件及其操作方法

    公开(公告)号:US08941425B2

    公开(公告)日:2015-01-27

    申请号:US14136582

    申请日:2013-12-20

    CPC classification number: H03K5/153

    Abstract: Provided is a semiconductor device for compensating for an internal skew without training with an external device. The semiconductor device includes a signal generating unit configured to generate and output a reference signal, a first receiving unit configured to receive the reference signal and output a first output signal, a second receiving unit configured to receive the reference signal and output a second output signal, a delay unit configured to delay the first output signal by a certain time and output a delayed signal, a sampling unit configured to sample the second output signal based on the delayed signal and output sampling data, and a skew controlling unit configured to control the delaying unit based on the sampling data.

    Abstract translation: 提供了用于补偿内部偏斜而不用外部设备进行训练的半导体器件。 半导体器件包括:信号生成单元,被配置为产生并输出参考信号;第一接收单元,被配置为接收参考信号并输出​​第一输出信号;第二接收单元,被配置为接收参考信号并输出​​第二输出信号 延迟单元,被配置为将所述第一输出信号延迟一定时间并输出延迟信号,所述采样单元被配置为基于所述延迟信号对所述第二输出信号进行采样并输出采样数据;以及歪斜控制单元, 基于采样数据的延迟单元。

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