公开(公告)号：US08693603B2

公开(公告)日：2014-04-08

申请号：US13668965

申请日：2012-11-05

Applicant: Samsung Electronics Co., Ltd.

Inventor： Jin Gook Kim ,  Dae Hyun Chung ,  Seung Jun Bae ,  Seung Hoon Lee ,  Won Hwa Shin

IPC: H04L12/66

CPC classification number: H03L7/0812 ,  G11C7/1051 ,  G11C7/1066 ,  G11C7/22 ,  G11C7/222 ,  G11C2207/107 ,  H04L7/0008 ,  H04L7/0091

Abstract: A semiconductor device includes a selection circuit and a phase detector. The selection circuit, in response to a first selection signal output from a controller, outputs as a timing signal a first clock signal output from the controller or an output signal of a PLL using the first clock signal as a first input. The phase detector generates a voltage signal indicating a phase difference between a second clock signal output from the controller and the timing signal output from the selection circuit. The semiconductor device further includes a data port, a memory core storing data, and a serializer, in response to the timing signal output from the selection circuit, serializing data output from the memory core and outputting serialized data to the controller via the data port. The controller generates the first selection signal based on at least one of the voltage signal and the serialized data.

Abstract translation: 半导体器件包括选择电路和相位检测器。 选择电路响应于从控制器输出的第一选择信号，作为定时信号输出从控制器输出的第一时钟信号或使用第一时钟信号作为第一输入的PLL的输出信号。 相位检测器产生指示从控制器输出的第二时钟信号与从选择电路输出的定时信号之间的相位差的电压信号。 半导体器件还包括数据端口，存储数据存储器核心和串行器，响应于从选择电路输出的定时信号，串行化从存储器核心输出的数据并经由数据端口将串行数据输出到控制器。 控制器基于电压信号和序列化数据中的至少一个产生第一选择信号。

公开(公告)号：US20130064030A1

公开(公告)日：2013-03-14

申请号：US13668965

申请日：2012-11-05

Applicant: Samsung Electronics Co., Ltd.

Inventor： Jin Gook Kim ,  Dae Hyun Chung ,  Seung Jun Bae ,  Seung-hoon Lee ,  Won Hwa Shin

IPC: G11C8/18 ,  G11C7/00

CPC classification number: H03L7/0812 ,  G11C7/1051 ,  G11C7/1066 ,  G11C7/22 ,  G11C7/222 ,  G11C2207/107 ,  H04L7/0008 ,  H04L7/0091

Abstract: A semiconductor device includes a selection circuit and a phase detector. The selection circuit, in response to a first selection signal output from a controller, outputs as a timing signal a first clock signal output from the controller or an output signal of a PLL using the first clock signal as a first input. The phase detector generates a voltage signal indicating a phase difference between a second clock signal output from the controller and the timing signal output from the selection circuit. The semiconductor device further includes a data port, a memory core storing data, and a serializer, in response to the timing signal output from the selection circuit, serializing data output from the memory core and outputting serialized data to the controller via the data port. The controller generates the first selection signal based on at least one of the voltage signal and the serialized data.

Abstract translation: 半导体器件包括选择电路和相位检测器。 选择电路响应于从控制器输出的第一选择信号，作为定时信号输出从控制器输出的第一时钟信号或使用第一时钟信号作为第一输入的PLL的输出信号。 相位检测器产生指示从控制器输出的第二时钟信号与从选择电路输出的定时信号之间的相位差的电压信号。 半导体器件还包括数据端口，存储数据存储器核心和串行器，响应于从选择电路输出的定时信号，串行化从存储器核心输出的数据并经由数据端口将串行数据输出到控制器。 控制器基于电压信号和序列化数据中的至少一个产生第一选择信号。