公开(公告)号：US11915782B2

公开(公告)日：2024-02-27

申请号：US17407585

申请日：2021-08-20

Applicant: Samsung Electronics Co., Ltd.

Inventor： Chang Min Lee ,  Nam Hyung Kim ,  Dae Jeong Kim ,  Do Han Kim ,  Min Su Kim ,  Deok Ho Seo ,  Won Jae Shin ,  Yong Jun Yu ,  Il Gyu Jung ,  In Su Choi

IPC: G11C7/10 ,  G11C8/18 ,  G11C7/14

CPC classification number: G11C7/1063 ,  G11C7/109 ,  G11C7/1012 ,  G11C7/14 ,  G11C8/18

Abstract: An electronic device including a memory device with improved reliability is provided. The semiconductor device comprises a data pin configured to transmit a data signal, a command/address pin configured to transmit a command and an address, a command/address receiver connected to the command/address pin, and a computing unit connected to the command/address receiver, wherein the command/address receiver receives a first command and a first address from the outside through the command/address pin and generates a first instruction on the basis of the first command and the first address, and the computing unit receives the first instruction and performs computation based on the first instruction.

公开(公告)号：US11323654B2

公开(公告)日：2022-05-03

申请号：US16632804

申请日：2018-06-21

Applicant: Samsung Electronics Co., Ltd.

Inventor： Chang Woo Lee ,  Do Han Kim ,  Jin Min Bang

IPC: H04N5/92 ,  H04N5/917 ,  H04N19/136 ,  H04N19/186 ,  G11B27/10 ,  H04N5/235 ,  H04N5/77 ,  H04N9/64

Abstract: According to various embodiments of the disclosure, disclosed is an electronic device including a processor and an image sensor module. The image sensor module includes an image sensor in which sensor pixels are arranged and a control circuit electrically connected to the image sensor and connected to the processor. The control circuit is configured to obtain raw image data including pieces of image pixel data, in which first pixel data corresponding to a first attribute and second pixel data corresponding to a second attribute are arranged in a first array, to identify rearrangement information predetermined based on the first attribute and the second attribute, to change the array of the pieces of image pixel data into a second array based on the rearrangement information such that at least part of the first pixel data is arranged adjacent and at least part of the second pixel data is arranged adjacent, to generate compression data obtained by compressing the pieces of image pixel data whose array is changed into the second array, and to transmit the compression data to the processor. The processor is configured to restore the raw image data. Other various embodiments as understood from the specification are also possible.

公开(公告)号：US11115605B2

公开(公告)日：2021-09-07

申请号：US16766943

申请日：2018-11-01

Applicant: Samsung Electronics Co., Ltd.

Inventor： Chang Woo Lee ,  Do Han Kim ,  Jin Min Bang ,  Ha Joong Park

IPC: H04N5/265 ,  H04N5/378 ,  H04N5/907 ,  H04N5/917

Abstract: Embodiments disclosed in the present document relate to a method and an apparatus for synthesizing images. An electronic device according to various embodiments of the present invention comprises: an image sensor; an image processing processor; and a control circuit which is electrically connected to the image sensor through a first designated interface and to the image processing processor through a second designated interface. The control circuit may be configured to: when the read out speed of the image sensor is set to a first designated speed, receive, through the first designated interface, first image data that has been obtained by using the image sensor and has not been compressed by the image sensor; transfer the first image data to the image processing processor through the second designated interface; when the read out speed of the image sensor is set to a second designated speed, receive, through the first designated interface, second image data being obtained by using the image sensor and being compressed by the image sensor; decompress the compressed second image data by means of the control circuit; and transfer the decompressed second image data to the image processing processor through the second designated interface.