公开(公告)号：US10714813B2

公开(公告)日：2020-07-14

申请号：US16367634

申请日：2019-03-28

Applicant: Samsung Electronics Co., Ltd.

Inventor： Dongho Yu ,  Kucheol Ahn

IPC: H01Q1/22 ,  H01Q5/30 ,  H01Q1/24 ,  H01Q21/06 ,  H01R13/24

Abstract: An electronic device having a space formed between a front face and a rear face thereof is provided. The electronic device includes a first cover disposed on the front face, a second cover disposed on the rear face, a frame surrounding a periphery of the first cover and a periphery of the second cover, at least one antenna module coupled to a first face of the second cover, and a printed circuit board disposed in the space and having a front face electrically connected to the at least one antenna module.

公开(公告)号：US20230200054A1

公开(公告)日：2023-06-22

申请号：US18084190

申请日：2022-12-19

Applicant: Samsung Electronics Co., Ltd.

Inventor： Jieun Lee ,  Dongho Yu ,  Deoksung Hwang ,  Gisung Kim ,  Seungyoung Seo

IPC: H10B12/00 ,  H01L23/528 ,  H01L23/522

CPC classification number: H10B12/315 ,  H10B12/482 ,  H01L23/5283 ,  H01L23/5226

Abstract: An integrated circuit device includes a substrate having an active region, a conductive landing pad at a first vertical level above the substrate and connected to the active region, a capacitor including a lower electrode at a second vertical level higher than the first vertical level above the substrate, and a conductive multifunction plug including an extended landing pad portion at a third vertical level between the first vertical level and the second vertical level and contacting the conductive landing pad, and an extended lower electrode portion integrally connected to the extended landing pad portion and contacting the lower electrode. The capacitor further includes a dielectric layer covering a surface of the lower electrode and the extended lower electrode portion of the conductive multifunction plug.

公开(公告)号：US20230121734A1

公开(公告)日：2023-04-20

申请号：US17865497

申请日：2022-07-15

Applicant: Samsung Electronics Co., Ltd.

Inventor： Dongho Yu ,  Jieun Lee ,  Deoksung Hwang ,  Gisung Kim ,  Seungyoung Seo

IPC: H01L27/108

Abstract: A semiconductor device may include bit line structures on a substrate, a contact plug structure on the substrate between the bit line structures, and a capacitor electrically connected to the contact plug structure. The contact plug structure may include a first contact plug, a second contact plug, and a third contact plug sequentially stacked. An upper surface of the second contact plug includes an upper recess. The third contact plug may fill the upper recess, and may protrude above the upper recess. An upper surface of the third contact plug may be higher than a top surface of the bit line structures.