公开(公告)号：US11785768B2

公开(公告)日：2023-10-10

申请号：US17360349

申请日：2021-06-28

申请人： Samsung Electronics Co., Ltd.

发明人： Euntaek Jung ,  Joongshik Shin ,  Dongyoun Shin

IPC分类号： H01L27/11519 ,  H10B41/27 ,  H10B41/10 ,  H10B41/35 ,  H10B43/10 ,  H10B43/27 ,  H10B43/35

CPC分类号： H10B41/27 ,  H10B41/10 ,  H10B41/35 ,  H10B43/10 ,  H10B43/27 ,  H10B43/35

摘要： A three-dimensional semiconductor memory device includes a substrate, an electrode structure including a plurality of gate electrodes sequentially stacked on the substrate in a first direction that extends perpendicular to an upper surface of the substrate, a source conductive pattern between the substrate and the electrode structure, a vertical semiconductor pattern penetrating the electrode structure and the source conductive pattern, and a data storage pattern extending in the first direction between the vertical semiconductor pattern and the electrode structure. A lower surface of the data storage pattern contacts the source conductive pattern. A portion of the lower surface of the data storage pattern is at a different height from the upper surface of the substrate, in relation to a height of another portion of the lower surface of the data storage pattern from the upper surface of the substrate.

公开(公告)号：US11063057B2

公开(公告)日：2021-07-13

申请号：US16152605

申请日：2018-10-05

申请人： Samsung Electronics Co., Ltd.

发明人： Euntaek Jung ,  JoongShik Shin ,  Dongyoun Shin

IPC分类号： H01L27/115 ,  H01L27/11556 ,  H01L27/11582 ,  H01L27/1157 ,  H01L27/11565 ,  H01L27/11524 ,  H01L27/11519

摘要： A three-dimensional semiconductor memory device includes a substrate, an electrode structure including a plurality of gate electrodes sequentially stacked on the substrate in a first direction that extends perpendicular to an upper surface of the substrate, a source conductive pattern between the substrate and the electrode structure, a vertical semiconductor pattern penetrating the electrode structure and the source conductive pattern, and a data storage pattern extending in the first direction between the vertical semiconductor pattern and the electrode structure. A lower surface of the data storage pattern contacts the source conductive pattern. A portion of the lower surface of the data storage pattern is at a different height from the upper surface of the substrate, in relation to a height of another portion of the lower surface of the data storage pattern from the upper surface of the substrate.