公开(公告)号：US12274085B2

公开(公告)日：2025-04-08

申请号：US17354605

申请日：2021-06-22

Applicant: Samsung Electronics Co., Ltd.

Inventor： Myung Gil Kang ,  Dong Won Kim ,  Geum Jong Bae ,  Kwan Young Chun

IPC: H10D30/67 ,  H10B10/00 ,  H10D62/10 ,  H10D84/85

Abstract: A semiconductor device is provided. The semiconductor device includes: a first wire pattern disposed on a substrate and extending in a first direction; a first gate electrode surrounding the first wire pattern and extending in a second direction, the first direction intersecting the second direction perpendicularly; a first transistor including the first wire pattern and the first gate electrode; a second wire pattern disposed on the substrate and extending in the first direction; a second gate electrode surrounding the second wire pattern and extending in the second direction; and a second transistor including the second wire pattern and the second gate electrode, wherein a width of the first wire pattern in the second direction is different from a width of the second wire pattern in the second direction.

公开(公告)号：US10243040B1

公开(公告)日：2019-03-26

申请号：US15964170

申请日：2018-04-27

Applicant: SAMSUNG ELECTRONICS CO., LTD.

Inventor： Woo Seok Park ,  Seung Min Song ,  Jung Gil Yang ,  Geum Jong Bae ,  Dong Il Bae

IPC: H01L29/66 ,  H01L29/06 ,  H01L29/78 ,  H01L29/417

Abstract: A semiconductor device including a transistor disposed on a first region of a substrate, the transistor including source/drain regions, a plurality of channel layers spaced apart from each other in a direction perpendicular to an upper surface of the substrate while connecting the source/drain regions, respectively, a gate electrode surrounding each of the plurality of channel layers, and a gate insulator between the gate electrode and the plurality of channel layers; and a non-active component disposed on a second region of the substrate, the non-active component including a fin structure including an a plurality of first semiconductor patterns alternately stacked with a plurality of second semiconductor patterns, an epitaxial region adjacent to the fin structure, a non-active electrode intersecting the fin structure, and a blocking insulation film between the non-active electrode and the fin structure.

公开(公告)号：US10014393B2

公开(公告)日：2018-07-03

申请号：US15361110

申请日：2016-11-25

Applicant: SAMSUNG ELECTRONICS CO., LTD.

Inventor： Seung Min Song ,  Dong Chan Suh ,  Jung Gil Yang ,  Geum Jong Bae ,  Woo Bin Song

IPC: H01L21/336 ,  H01L29/66 ,  H01L29/06 ,  H01L29/423 ,  H01L29/49

CPC classification number: H01L29/66795 ,  H01L29/0676 ,  H01L29/4236 ,  H01L29/42392 ,  H01L29/495 ,  H01L29/66545 ,  H01L29/6656 ,  H01L29/66666 ,  H01L29/78696

Abstract: A method of manufacturing semiconductor device includes forming a plurality of sacrificial layers and a plurality of semiconductor layers repeatedly and alternately stacked on a substrate, partially removing the sacrificial layers, forming spacers in removed regions of the sacrificial layers, and replacing remaining portions of the sacrificial layers with a gate electrode. Each of the sacrificial layers includes first portions disposed adjacent to the plurality of semiconductor layers and a second portions disposed between the first portions. The second portion having a different composition from the first portions.

公开(公告)号：US09985141B2

公开(公告)日：2018-05-29

申请号：US15666844

申请日：2017-08-02

Applicant: Samsung Electronics Co., Ltd.

Inventor： Jong Ho Lee ,  Ho Jun Kim ,  Sung Dae Suk ,  Geum Jong Bae

IPC: H01L29/78 ,  H01L29/786 ,  H01L29/423 ,  H01L29/06

CPC classification number: H01L29/78696 ,  H01L29/0665 ,  H01L29/42376 ,  H01L29/42392 ,  H01L29/66545

Abstract: A semiconductor device according to example embodiments of inventive concepts may include a substrate, source/drain regions extending perpendicular to an upper surface of the substrate, a plurality of nanosheets on the substrate and separated from each other, and a gate electrode and a gate insulating layer on the substrate. The nanosheets define channel regions that extend in a first direction between the source/drain regions. The gate electrode surrounds the nanosheets and extends in a second direction intersecting the first direction. The gate insulating layer is between the nanosheets and the gate electrode. A length of the gate electrode in the first direction may be greater than a space between adjacent nanosheets among the nanosheets.

公开(公告)号：US11462537B2

公开(公告)日：2022-10-04

申请号：US16919300

申请日：2020-07-02

Applicant: SAMSUNG ELECTRONICS CO., LTD.

Inventor： Yeong Han Gwon ,  Soo Yeon Jeong ,  Geum Jong Bae ,  Dong Il Bae

IPC: H01L27/092 ,  H01L23/535 ,  H01L29/423 ,  H01L29/786 ,  H01L27/088 ,  H01L29/78

Abstract: A semiconductor device includes a substrate, a first lower pattern and a second lower pattern on the substrate and arranged in a line in a first direction, a first active pattern stack disposed on and spaced apart from the first lower pattern, a second active pattern stack disposed on and spaced apart from the first lower pattern, a fin-cut gate structure disposed on the first lower pattern and overlapping a portion of the first lower pattern, a first gate structure surrounding the first active pattern stack and extending in a second direction crossing the first direction, a second gate structure surrounding the second active pattern stack and extending in the second direction, and a device isolation layer between the first gate structure and the second gate structure and separating the first lower pattern and the second lower pattern.

公开(公告)号：US10453839B2

公开(公告)日：2019-10-22

申请号：US16258833

申请日：2019-01-28

Applicant: SAMSUNG ELECTRONICS CO., LTD.

Inventor： Sung Min Kim ,  Dong Won Kim ,  Geum Jong Bae

IPC: H01L27/088 ,  H01L27/02 ,  H01L21/8234 ,  H01L21/308 ,  H01L21/02 ,  H01L29/66

Abstract: A semiconductor device is provided. The semiconductor device includes a substrate, a plurality of fins comprising a first fin, a second fin, a third fin, a fourth fin and a fifth fin, each of the plurality of protruding from the substrate in a first direction, and spaced apart from one another in a second direction that intersects the first direction and a plurality of trenches comprising a first trench, a second trench, a third trench and a fourth trench, each of the plurality of trenches being formed between adjacent fins of the plurality of fins, wherein variation of a first width of the first trench and a third width of the third trench is smaller than a first variation, wherein variation of a second width of the second trench and a fourth width of the fourth trench is smaller than a second variation, and wherein the second variation is greater than the first variation.

公开(公告)号：US10229908B2

公开(公告)日：2019-03-12

申请号：US15709023

申请日：2017-09-19

Applicant: SAMSUNG ELECTRONICS CO., LTD.

Inventor： Sung Min Kim ,  Dong Won Kim ,  Geum Jong Bae

IPC: H01L27/088 ,  H01L27/02 ,  H01L21/8234 ,  H01L21/02 ,  H01L29/66

Abstract: A semiconductor device is provided. The semiconductor device includes a substrate, a plurality of fins comprising a first fin, a second fin, a third fin, a fourth fin and a fifth fin, each of the plurality of protruding from the substrate in a first direction, and spaced apart from one another in a second direction that intersects the first direction and a plurality of trenches comprising a first trench, a second trench, a third trench and a fourth trench, each of the plurality of trenches being formed between adjacent fins of the plurality of fins, wherein variation of a first width of the first trench and a third width of the third trench is smaller than a first variation, wherein variation of a second width of the second trench and a fourth width of the fourth trench is smaller than a second variation, and wherein the second variation is greater than the first variation.

公开(公告)号：US09825183B2

公开(公告)日：2017-11-21

申请号：US15222276

申请日：2016-07-28

Applicant: Samsung Electronics Co., Ltd.

Inventor： Jong Ho Lee ,  Ho Jun Kim ,  Sung Dae Suk ,  Geum Jong Bae

IPC: H01L21/02 ,  H01L29/786 ,  H01L29/06 ,  H01L29/423

CPC classification number: H01L29/78696 ,  H01L29/0665 ,  H01L29/42376 ,  H01L29/42392 ,  H01L29/66545

Abstract: A semiconductor device according to example embodiments of inventive concepts may include a substrate, source/drain regions extending perpendicular to an upper surface of the substrate, a plurality of nanosheets on the substrate and separated from each other, and a gate electrode and a gate insulating layer on the substrate. The nanosheets define channel regions that extend in a first direction between the source/drain regions. The gate electrode surrounds the nanosheets and extends in a second direction intersecting the first direction. The gate insulating layer is between the nanosheets and the gate electrode. A length of the gate electrode in the first direction may be greater than a space between adjacent nanosheets among the nanosheets.

公开(公告)号：US11699728B2

公开(公告)日：2023-07-11

申请号：US17127230

申请日：2020-12-18

Applicant: SAMSUNG ELECTRONICS CO., LTD.

Inventor： Chang Woo Noh ,  Seung Min Song ,  Geum Jong Bae ,  Dong Il Bae

IPC: H01L29/66 ,  H01L29/417 ,  H01L21/768 ,  H01L29/06 ,  H01L29/78

CPC classification number: H01L29/41791 ,  H01L21/76897 ,  H01L29/0653 ,  H01L29/66795 ,  H01L29/7853 ,  H01L2029/7858

Abstract: A semiconductor device including a fin field effect transistor (fin-FET) includes active fins disposed on a substrate, isolation layers on both sides of the active fins, a gate structure formed to cross the active fins and the isolation layers, source/drain regions on the active fins on sidewalls of the gate structure, a first interlayer insulating layer on the isolation layers in contact with portions of the sidewalls of the gate structure and portions of surfaces of the source/drain regions, an etch stop layer configured to overlap the first interlayer insulating layer, the sidewalls of the gate structure, and the source/drain regions, and contact plugs formed to pass through the etch stop layer to contact the source/drain regions. The source/drain regions have main growth portions in contact with upper surfaces of the active fins.

公开(公告)号：US11683925B2

公开(公告)日：2023-06-20

申请号：US17387192

申请日：2021-07-28

Applicant: Samsung Electronics Co., Ltd.

Inventor： Jung Gil Yang ,  Sun Wook Kim ,  Jun Beom Park ,  Tae Young Kim ,  Geum Jong Bae

IPC: H01L23/528 ,  H01L29/06 ,  H01L29/786 ,  H01L29/775 ,  B82Y10/00 ,  H01L27/02 ,  H01L29/423 ,  H10B10/00

CPC classification number: H10B10/125 ,  H01L23/528

Abstract: A semiconductor device includes first and second fin type patterns, first and second gate patterns intersecting the first and second fin type patterns, third and fourth gate patterns intersecting the first fin type pattern between the first and the second gate patterns, a fifth gate pattern intersecting the second fin type pattern, a sixth gate pattern intersecting the second fin type pattern, first to third semiconductor patterns disposed among the first, the third, the fourth and the second gate patterns, and fourth to sixth semiconductor patterns disposed among the first, the fifth, the sixth and the second gate patterns. The first semiconductor pattern to the fourth semiconductor pattern and the sixth semiconductor pattern are electrically connected to a wiring structure, and the fifth semiconductor pattern is not connected to the wiring structure.