公开(公告)号：US20220238148A1

公开(公告)日：2022-07-28

申请号：US17722494

申请日：2022-04-18

Applicant: Samsung Electronics Co., Ltd.

Inventor： YOUNGCHEON KWON ,  SANGHYUK KWON ,  KYOMIN SOHN ,  JAEYOUN YOUN ,  HAESUK LEE

IPC: G11C11/406 ,  G11C11/408

Abstract: A memory device according to some aspects of the inventive concepts includes a memory cell array including a plurality of banks, at least one Processing Element (PE) connected to at least one bank selected from the plurality of banks, and a control logic configured to control an active operation in which wordlines included in each of the plurality of banks is activated, and configured to control a refresh operation in which at least one bank is refreshed, based on a PE enable signal configured to selectively enable the at least one PE.

公开(公告)号：US20250169067A1

公开(公告)日：2025-05-22

申请号：US19028305

申请日：2025-01-17

Applicant: SAMSUNG ELECTRONICS CO., LTD.

Inventor： JAESAN KIM ,  SEUNGHAN WOO ,  HAESUK LEE ,  YOUNGCHEON KWON ,  REUM OH

IPC: H10B12/00 ,  H01L23/48 ,  H01L23/528 ,  H10D1/43 ,  H10D1/66

Abstract: A semiconductor device includes a semiconductor structure including a semiconductor substrate having an active zone with a channel; a through silicon via (TSV) structure including a power TSV configured to transmit power and a signal TSV configured to transmit a signal; and a keep-out zone located a predetermined distance away from the TSV structure and bounded by the active zone. The TSV structure penetrates the semiconductor substrate. The keep-out zone includes a first element area a first distance away from the power TSV, and a second element area a second distance away from the signal TSV.