公开(公告)号：US20190131171A1

公开(公告)日：2019-05-02

申请号：US15959783

申请日：2018-04-23

Applicant: Samsung Electronics Co., Ltd.

Inventor： Min Chan Gwak ,  HWI CHAN JUN ,  HEON JONG SHIN ,  SO RA YOU ,  SANG HYUN LEE ,  IN CHAN HWANG

IPC: H01L21/768 ,  H01L23/522 ,  H01L23/528 ,  H01L29/66 ,  H01L29/417

Abstract: A semiconductor device includes a plurality of active regions spaced apart from each other and extending linearly in parallel on a substrate. A gate electrode crosses the plurality of active regions, and respective drain regions are on and/or in respective ones of the active regions on a first side of the gate electrode and respective source regions are on and/or in respective ones of the active regions on a second side of the gate electrode. A drain plug is disposed on the drain regions and a source plug is disposed on the source regions. A gate plug is disposed on the gate electrode between the drain plug and the source plug such that a straight line passing through a center of the drain plug and a center of the source plug intersects the gate plug.

公开(公告)号：US20170162668A1

公开(公告)日：2017-06-08

申请号：US15348040

申请日：2016-11-10

Applicant: SAMSUNG ELECTRONICS CO., LTD.

Inventor： SUNG MIN KIM ,  HEON JONG SHIN

IPC: H01L29/66 ,  H01L29/78 ,  H01L29/06 ,  H01L21/762

CPC classification number: H01L29/66545 ,  H01L21/28114 ,  H01L21/76224 ,  H01L29/0653 ,  H01L29/66795 ,  H01L29/785 ,  H01L29/7851

Abstract: A method of manufacturing a semiconductor device includes forming a fin extending in a first direction. A dummy layer is formed including a plurality of semiconductor layers disposed on the fin. Each of the plurality of semiconductor layers have different impurity concentrations from each other. The dummy layer is etched to form a dummy gate electrode.