-
公开(公告)号：US20220036857A1
公开(公告)日：2022-02-03
申请号：US17155487
申请日：2021-01-22
Applicant: SAMSUNG ELECTRONICS CO., LTD.
Inventor： HONGKI KWON , TAEWOO KIM , JINYONG PARK , HYUNWOOK LIM , WOOHYUK JANG , HOJUN CHUNG
IPC: G09G5/10
Abstract: A method of luminance compensation includes; generating luminance compensation data based on test image data, each of the test image data corresponding to one gray level, and each of the luminance compensation data including compensation values corresponding to the one gray level, generating intra-plane data based on the luminance compensation data, one of the intra-plane data being generated based on one of the luminance compensation data, generating inter-plane stream data based on the intra-plane data, one of the inter-plane stream data being generated based on data blocks included in the intra-plane data and disposed at a same location within the intra-plane data, and sequentially storing the inter-plane stream data in a memory.
-
公开(公告)号：US20200211495A1
公开(公告)日：2020-07-02
申请号：US16814535
申请日：2020-03-10
Applicant: SAMSUNG ELECTRONICS CO., LTD.
Inventor： KYONGHO KIM , JINHO KIM , JAEYOUL LEE , HYUNWOOK LIM , YOUNGMIN CHOI
IPC: G09G5/00
Abstract: An electronic device includes; a timing controller that generates a command to-be-sent to a display driver integrated circuit (DDI) selected from among a plurality of display driver integrated circuits (DDIs) connected to the timing controller through data lines and a shared channel The DDI is selected by a DDI control signal transferred from the timing controller to the DDI through a corresponding data line among the data lines, and the command is transferred from the timing controller to the DDI through the shared channel
-
3.发明公开公开(公告)号：US20230153591A1
公开(公告)日：2023-05-18
申请号：US18050699
申请日：2022-10-28
Applicant: SAMSUNG ELECTRONICS CO., LTD.
Inventor： SE WHAN NA , UNKI PARK , JIHEON OK , JOOYOUNG AN , HYUNWOOK LIM
Abstract: The described techniques provide efficient semiconductor device configurations and improved processes for facilitating artificial intelligence operations. In an example, a semiconductor device may be configured with first memory for storing data before an artificial intelligence operation and second memory for storing data after an artificial intelligence operation. The use of the first memory and the second memory for storing data before and after the artificial intelligence operation, respectively, may support a simplified layout for a semiconductor device to facilitate artificial intelligence operations with minimal hardware configurations and limited software. In addition, the use of the first memory and the second memory for storing data before and after the artificial intelligence operation, respectively, may allow for processing when the domains of input data and output data are different.
-
公开(公告)号：US20220208067A1
公开(公告)日：2022-06-30
申请号：US17367471
申请日：2021-07-05
Applicant: SAMSUNG ELECTRONICS CO., LTD.
Inventor： PILSEUNG HEO , JINYONG PARK , HYEONSU PARK , HYUNWOOK LIM
Abstract: A luminance compensator includes a memory device and a luminance compensation circuit. The memory device stores a plurality of luminance compensation data and provides first luminance compensation data and second luminance compensation data among the plurality of luminance compensation data in response to a frame rate dimming-on signal. The first luminance compensation data corresponds to a first frame rate. The second luminance compensation data corresponds to a second frame rate. The plurality of luminance compensation data is for compensating luminance of at least one region that operates with a plurality of frame rates. The frame rate dimming-on signal represents time intervals in which frame rates of the at least one region are gradually changed. The luminance compensation circuit generates third luminance compensation data in response to the frame rate dimming-on signal, the first luminance compensation data, and the second luminance compensation data.
-
公开(公告)号：US20240296769A1
公开(公告)日：2024-09-05
申请号：US18238885
申请日：2023-08-28
Applicant: SAMSUNG ELECTRONICS CO., LTD.
Inventor： SEONG-YOUNG RYU , SUNKWON KIM , WANGSUK SUNG , UIJONG SONG , YILHO LEE , Heejin LEE , HYUNWOOK LIM
IPC: G09G3/20
CPC classification number: G09G3/20 , G09G2310/0267 , G09G2310/0275 , G09G2310/0291 , G09G2310/08
Abstract: A display device is provided. The display device includes: a pixel array including pixels connected to gate lines and source lines; and a driving circuit configured to: apply gate signals to the gate lines and provide data signals to the source lines during a first scan period such that horizontal periods of the gate signals do not overlap each other, and apply the gate signals to first gate lines, of the gate lines, connected to pixels in a first area of the pixel array in a different manner from second gate lines, of the gate lines, connected to pixels in a second area of the pixel array for a portion of a second scan period, provide the data signals to the source lines, and maintain a low-biased state or an off state for a remaining portion of the second scan period.
-
Patent Agency Ranking
6.发明申请公开(公告)号：US20210366442A1
公开(公告)日：2021-11-25
申请号：US17393691
申请日：2021-08-04
Applicant: SAMSUNG ELECTRONICS CO., LTD.
Inventor： TAEWOO KIM , HONGKI KWON , JAEHUN KIM , JINYONG PARK , JAEYOUL LEE , HYUNWOOK LIM , WOOHYUK JANG , HOJUN CHUNG
Abstract: A display driver circuit includes a receiver that receives a still image or a moving image, a frame buffer that stores the still image received by the receiver in a still image mode, an image processor that performs an image enhancement operation on the moving image transferred from the receiver or the still image transferred from the frame buffer, and a motion processor that performs a motion compensation operation using a current frame output from the image processor and a previous frame stored in the frame buffer in a moving image mode. The previous frame is data which, in the moving image mode, are processed by the image processor before the current frame and are then stored in the frame buffer. The previous frame is output from the frame buffer to the motion processor in synchronization with the current frame.
-
7.发明申请公开(公告)号：US20200168183A1
公开(公告)日：2020-05-28
申请号：US16584228
申请日：2019-09-26
Applicant: SAMSUNG ELECTRONICS CO., LTD.
Inventor： TAEWOO KIM , HONGKI KWON , JAEHUN KIM , JINYONG PARK , JAEYOUL LEE , HYUNWOOK LIM , WOOHYUK JANG , HOJUN CHUNG
Abstract: A display driver circuit includes a receiver that receives a still image or a moving image, a frame buffer that stores the still image received by the receiver in a still image mode, an image processor that performs an image enhancement operation on the moving image transferred from the receiver or the still image transferred from the frame buffer, and a motion processor that performs a motion compensation operation using a current frame output from the image processor and a previous frame stored in the frame buffer in a moving image mode. The previous frame is data which, in the moving image mode, are processed by the image processor before the current frame and are then stored in the frame buffer. The previous frame is output from the frame buffer to the motion processor in synchronization with the current frame.
-
公开(公告)号：US20220376960A1
公开(公告)日：2022-11-24
申请号：US17680583
申请日：2022-02-25
Applicant: Samsung Electronics Co., Ltd.
Inventor： YOUNGHWAN CHANG , EUN-YOUNG JIN , YOUNGSEO KIM , KILHOON LEE , HYUNWOOK LIM , SENG-SUB CHUN
Abstract: An operation method of a receiver, which includes setting a coefficient of an equalizer based on one of a plurality of first codes, setting a coefficient of an amplifier based on one of a plurality of second codes, performing offset calibration by driving the equalizer and the amplifier based on the coefficient of the equalizer and the coefficient of the amplifier, storing an offset code corresponding to a voltage offset generated when the equalizer and the amplifier are driven, determining whether the offset calibration is completed, performing a normal operation of obtaining reception data from an input signal, in response to determining that the offset calibration is completed, and removing the voltage offset based on the offset code, in the normal operation.
-
公开(公告)号：US20220093026A1
公开(公告)日：2022-03-24
申请号：US17462646
申请日：2021-08-31
Applicant: SAMSUNG ELECTRONICS CO., LTD.
Inventor： BYEONGCHEOL JANG , YONGHOON YU , HONGKI KWON , TAEWOO KIM , JINYONG PARK , HYUNWOOK LIM , WOOHYUK JANG , HOJUN CHUNG
IPC: G09G3/20
Abstract: Provided are a low-power display driving circuit performing internal encoding and decoding and an operating method thereof. The display driving circuit includes a memory configured to store an input bit stream encoded by an encoder and a controller configured to determine a data path through which output frame data in a second frame period passes according to whether internal encoding is successful in a first frame period, wherein, when the internal encoding is successful, the controller performs internal encoding in the second frame period, stores a generated internal bit stream in the memory, allows the internal bit stream to pass through a low-power path to generate the output frame data, and when the internal encoding fails, the controller generates the output frame data by allowing the input bit stream to pass through a normal path in the second frame period, changes an encoding setting of an internal encoder, and repeats the internal encoding.
-
公开(公告)号：US20200169261A1
公开(公告)日：2020-05-28
申请号：US16511733
申请日：2019-07-15
Applicant: SAMSUNG ELECTRONICS CO., LTD,
Inventor： KYUNGHO RYU , HANSU PAE , KILHOON LEE , JAEYOUL LEE , JUNG-PIL LIM , HYUNWOOK LIM
Abstract: An electronic circuit includes a clock recovery circuit that generates a first reference clock signal based on first reception data and generates a second reference clock signal based on second reception data received after the first reception, a sampling clock generator that generates a sampling clock signal having a phase based on a phase difference between the first reference clock signal and the second reference clock signal, and a sampler that recovers the second reception data based on the generated sampling clock signal.
-
-
-
-
-
-
-
-
-
Search Results
10
records
(took 0.013 seconds)
