公开(公告)号：US09391090B2

公开(公告)日：2016-07-12

申请号：US14804338

申请日：2015-07-21

Applicant: Samsung Electronics Co., Ltd.

Inventor： Wanit Manorotkul ,  Joong-han Shin ,  Bong-jin Kuh ,  Han-mei Choi ,  Dmitry Mikulik

IPC: H01L27/115

CPC classification number: H01L27/11575 ,  H01L21/02532 ,  H01L21/02592 ,  H01L21/02675 ,  H01L21/32055 ,  H01L23/528 ,  H01L27/11519 ,  H01L27/11526 ,  H01L27/11548 ,  H01L27/11556 ,  H01L27/11565 ,  H01L27/11573 ,  H01L27/11582

Abstract: An IC device includes a polycrystalline silicon thin film interposed between a first level semiconductor circuit and a second level semiconductor circuit which are formed on a substrate and disposed to vertically overlap each other. The polycrystalline silicon thin film includes at least one silicon single crystal. The at least one silicon single crystal includes a flat horizontal portion, which provides an active region of the second level semiconductor device, and a pin-shaped protruding portion protruding from the flat horizontal portion toward the first level semiconductor device.

Abstract translation: IC器件包括插入在第一级半导体电路和第二级半导体电路之间的多晶硅薄膜，其形成在基板上并且彼此垂直重叠。 多晶硅薄膜包括至少一个硅单晶。 所述至少一个硅单晶包括提供所述第二电平半导体器件的有源区的平坦水平部分和从所述平坦水平部分向所述第一电平半导体器件突出的销状突出部分。

公开(公告)号：US08970039B2

公开(公告)日：2015-03-03

申请号：US13707394

申请日：2012-12-06

Applicant: Samsung Electronics Co., Ltd.

Inventor： Bong-jin Kuh ,  Sang-ryol Yang ,  Soon-wook Jung ,  Young-sub You ,  Byung-hong Chung ,  Han-mei Choi ,  Jong-sung Lim

IPC: H01L23/12 ,  H01L23/48 ,  H01L29/40 ,  H01L23/498 ,  H01L27/108 ,  H01L49/02

CPC classification number: H01L23/49827 ,  H01L27/10814 ,  H01L27/10852 ,  H01L27/10876 ,  H01L27/10891 ,  H01L28/91 ,  H01L2924/0002 ,  H01L2924/00

Abstract: A semiconductor device includes a plurality of electrode structures perpendicularly extending on a substrate, and at least one support unit extending between the plurality of electrode structures. The support unit includes at least one support layer including a noncrystalline metal oxide contacting a part of the plurality of electrode structures. Related devices and fabrication methods are also discussed.

Abstract translation: 半导体器件包括在衬底上垂直延伸的多个电极结构以及在多个电极结构之间延伸的至少一个支撑单元。 支撑单元包括至少一个支撑层，其包括接触多个电极结构的一部分的非结晶金属氧化物。 还讨论了相关设备和制造方法。

公开(公告)号：US09576969B2

公开(公告)日：2017-02-21

申请号：US15185020

申请日：2016-06-17

Applicant: Samsung Electronics Co., Ltd.

Inventor： Wanit Manorotkul ,  Joong-han Shin ,  Bong-jin Kuh ,  Han-mei Choi ,  Dmitry Mikulik

IPC: H01L27/115 ,  H01L21/02 ,  H01L21/3205 ,  H01L23/528

CPC classification number: H01L27/11575 ,  H01L21/02532 ,  H01L21/02592 ,  H01L21/02675 ,  H01L21/32055 ,  H01L23/528 ,  H01L27/11519 ,  H01L27/11526 ,  H01L27/11548 ,  H01L27/11556 ,  H01L27/11565 ,  H01L27/11573 ,  H01L27/11582

Abstract: An IC device includes a polycrystalline silicon thin film interposed between a first level semiconductor circuit and a second level semiconductor circuit which are formed on a substrate and disposed to vertically overlap each other. The polycrystalline silicon thin film includes at least one silicon single crystal. The at least one silicon single crystal includes a flat horizontal portion, which provides an active region of the second level semiconductor device, and a pin-shaped protruding portion protruding from the flat horizontal portion toward the first level semiconductor device.

Abstract translation: IC器件包括插入在第一级半导体电路和第二级半导体电路之间的多晶硅薄膜，其形成在基板上并且彼此垂直重叠。 多晶硅薄膜包括至少一个硅单晶。 所述至少一个硅单晶包括提供所述第二电平半导体器件的有源区的平坦水平部分和从所述平坦水平部分向所述第一电平半导体器件突出的销状突出部分。

公开(公告)号：US08993420B2

公开(公告)日：2015-03-31

申请号：US14133944

申请日：2013-12-19

Applicant: Samsung Electronics Co., Ltd.

Inventor： Joong-han Shin ,  Bong-jin Kuh ,  Ki-chul Kim ,  Jeong-meung Kim ,  Eun-ha Lee ,  Jong-sung Lim ,  Han-mei Choi

IPC: H01L21/36 ,  H01L21/02

CPC classification number: H01L21/02381 ,  H01L21/02532 ,  H01L21/02667

Abstract: A method of forming an epitaxial layer includes forming a plurality of first insulation patterns in a substrate, the plurality of first insulation patterns spaced apart from each other, forming first epitaxial patterns on the plurality of first insulation patterns, forming second insulation patterns between the plurality of first insulation patterns to contact the plurality of first insulation patterns, and forming second epitaxial patterns on the second insulation patterns and between the first epitaxial patterns to contact the first epitaxial patterns, the first epitaxial patterns and the second epitaxial patterns forming a single epitaxial layer.

Abstract translation: 形成外延层的方法包括在基板中形成多个第一绝缘图案，多个第一绝缘图案彼此间隔开，在多个第一绝缘图案上形成第一外延图案，在多个第一绝缘图案之间形成第二绝缘图案 的第一绝缘图案以接触所述多个第一绝缘图案，以及在所述第二绝缘图案上和所述第一外延图案之间以及所述第一外延图案之间形成第二外延图案以接触所述第一外延图案，所述第一外延图案和所述第二外延图案形成单个外延层 。

公开(公告)号：US20130147048A1

公开(公告)日：2013-06-13

申请号：US13707394

申请日：2012-12-06

Applicant: Samsung Electronics Co., Ltd.

Inventor： Bong-jin KUH ,  Sang-ryol Yang ,  Soon-wook Jung ,  Young-sub You ,  Byung-hong Chung ,  Han-mei Choi ,  Jong-sung Lim

IPC: H01L23/498

CPC classification number: H01L23/49827 ,  H01L27/10814 ,  H01L27/10852 ,  H01L27/10876 ,  H01L27/10891 ,  H01L28/91 ,  H01L2924/0002 ,  H01L2924/00

Abstract: A semiconductor device includes a plurality of electrode structures perpendicularly extending on a substrate, and at least one support unit extending between the plurality of electrode structures. The support unit includes at least one support layer including a noncrystalline metal oxide contacting a part of the plurality of electrode structures. Related devices and fabrication methods are also discussed.

Abstract translation: 半导体器件包括在衬底上垂直延伸的多个电极结构以及在多个电极结构之间延伸的至少一个支撑单元。 支撑单元包括至少一个支撑层，其包括接触多个电极结构的一部分的非结晶金属氧化物。 还讨论了相关设备和制造方法。