Regulator circuit for reducing output ripple

    公开(公告)号:US10008927B2

    公开(公告)日:2018-06-26

    申请号:US15221629

    申请日:2016-07-28

    Abstract: A regulator circuit includes an operational amplifier, a buffer, a power transistor, a first feedback circuit, a current sensor, and second feedback circuit. The operational amplifier drives a first node with a first voltage generated by amplifying a difference between an input voltage and a feedback voltage. The buffer drives a second node with a second voltage generated by buffering the first voltage. The power transistor has a drain receiving a supply voltage, a gate connected to the second node, and a source connected to a third node. The current sensor generates a first sensing current based on the second voltage. The second feedback circuit generates a plurality of feedback currents corresponding to a ripple of the output voltage and enhances a speed at which the ripple is reduced by providing at least one of the plurality of feedback currents to the third node.

    Voltage regulator for suppressing overshoot and undershoot and devices including the same

    公开(公告)号:US09983605B2

    公开(公告)日:2018-05-29

    申请号:US15230849

    申请日:2016-08-08

    CPC classification number: G05F1/575

    Abstract: A voltage regulator may include an error amplifier configured to amplify a difference between a reference voltage and a feedback voltage and generate a first amplified voltage based thereon; a power transistor between a second voltage supply node and an output node of the voltage regulator, the power transistor including a gate configured to receive a gate voltage; a buffer between a first voltage supply node and a ground, the buffer configured to generate the gate voltage based on the first amplified voltage; a voltage divider between the output node and the ground, the voltage divider configured to generate the feedback voltage based on the output voltage; and a control circuit configured to connect the output node to the ground through the gate of the power transistor based on the output voltage and the gate voltage.

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