Semiconductor Devices Having Shallow Junctions
    1.
    发明申请
    Semiconductor Devices Having Shallow Junctions 审中-公开
    具有浅接头的半导体器件

    公开(公告)号:US20140287564A1

    公开(公告)日:2014-09-25

    申请号:US14287546

    申请日:2014-05-27

    Abstract: Semiconductor devices are provided including a substrate having a first surface and a second surface recessed from opposite sides of the first surface, a gate pattern formed on the first surface and having a gate insulating layer and a gate electrode, a carbon-doped silicon buffer layer formed on the second surface, and source and drain regions doped with an n-type dopant or p-type dopant, epitaxially grown on the silicon buffer layer to be elevated from a top surface of the gate insulating layer.

    Abstract translation: 提供了半导体器件,其包括具有从第一表面的相对侧凹入的第一表面和第二表面的衬底,形成在第一表面上并具有栅极绝缘层和栅电极的栅极图案,碳掺杂硅缓冲层 形成在第二表面上,以及掺杂有n型掺杂剂或p型掺杂剂的源极和漏极区,其外延生长在硅缓冲层上以从栅极绝缘层的顶表面升高。

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