公开(公告)号：US11322494B2

公开(公告)日：2022-05-03

申请号：US17015307

申请日：2020-09-09

Applicant: Samsung Electronics Co., Ltd.

Inventor： Kyungin Choi ,  Taehyeon Kim ,  Hongshik Shin ,  Taegon Kim ,  Jaeyoung Park ,  Yuichiro Sasaki

IPC: H01L27/092 ,  H01L21/768 ,  H01L21/8238 ,  H01L29/66 ,  H01L29/78 ,  H01L29/417 ,  H01L21/225 ,  H01L29/161 ,  H01L29/165 ,  H01L21/285

Abstract: A method of fabricating a semiconductor device includes pattering an upper portion of a substrate to form a first active pattern, the substrate including a semiconductor element having a first lattice constant, performing a selective epitaxial growth process on an upper portion of the first active pattern to form a first source/drain region, doping the first source/drain region with gallium, performing an annealing process on the first source/drain region doped with gallium, and forming a first contact pattern coupled to the first source/drain region. The first source/drain region includes a semiconductor element having a second lattice constant larger than the first lattice constant.

公开(公告)号：US10804269B2

公开(公告)日：2020-10-13

申请号：US16419318

申请日：2019-05-22

Applicant: Samsung Electronics Co., Ltd.

Inventor： Kyungin Choi ,  Taehyeon Kim ,  Hongshik Shin ,  Taegon Kim ,  Jaeyoung Park ,  Yuichiro Sasaki

IPC: H01L27/092 ,  H01L29/66 ,  H01L29/78 ,  H01L29/417 ,  H01L21/225 ,  H01L21/768 ,  H01L21/8238 ,  H01L29/161 ,  H01L29/165 ,  H01L21/285

Abstract: A method of fabricating a semiconductor device includes pattering an upper portion of a substrate to form a first active pattern, the substrate including a semiconductor element having a first lattice constant, performing a selective epitaxial growth process on an upper portion of the first active pattern to form a first source/drain region, doping the first source/drain region with gallium, performing an annealing process on the first source/drain region doped with gallium, and forming a first contact pattern coupled to the first source/drain region. The first source/drain region includes a semiconductor element having a second lattice constant larger than the first lattice constant.

公开(公告)号：US10355000B2

公开(公告)日：2019-07-16

申请号：US15793442

申请日：2017-10-25

Applicant: Samsung Electronics Co., Ltd.

Inventor： Kyungin Choi ,  Taehyeon Kim ,  Hongshik Shin ,  Taegon Kim ,  Jaeyoung Park ,  Yuichiro Sasaki

IPC: H01L27/092 ,  H01L21/82 ,  H01L21/768 ,  H01L21/225 ,  H01L21/8238 ,  H01L29/66 ,  H01L29/78 ,  H01L29/161 ,  H01L29/165

Abstract: A method of fabricating a semiconductor device includes pattering an upper portion of a substrate to form a first active pattern, the substrate including a semiconductor element having a first lattice constant, performing a selective epitaxial growth process on an upper portion of the first active pattern to form a first source/drain region, doping the first source/drain region with gallium, performing an annealing process on the first source/drain region doped with gallium, and forming a first contact pattern coupled to the first source/drain region. The first source/drain region includes a semiconductor element having a second lattice constant larger than the first lattice constant.