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1.发明申请公开(公告)号：US20170010832A1
公开(公告)日：2017-01-12
申请号：US15270513
申请日：2016-09-20
Applicant: Samsung Electronics Co., Ltd.
Inventor： Jae-Hyeon Ju , Young Joon Choi , Han Gu Sohn , Hyo Jin Jeong
CPC classification number: G06F3/0625 , G06F3/0634 , G06F3/0655 , G06F3/0679 , G06F12/0246 , G06F12/0292 , G06F2212/1028 , G11C7/1072 , Y02D10/13
Abstract: A non-volatile memory system and a method of managing the power of the same are provided. The non-volatile memory system includes a non-volatile memory configured to store a first mapping table comprising a list of a logical address and a physical address corresponding to the logical address with respect to a code region and a list of a logical address and a physical address corresponding to the logical address with respect to a general purpose (GP) region, and a controller configured to load the first mapping table from the non-volatile memory to a first memory and load the second mapping table from the non-volatile memory to a second memory. Power-up of the second memory is delayed with respect to power-up of the non-volatile memory system and the first or second memory is powered down if a condition is satisfied, so that power consumption of the non-volatile memory system is reduced.
Abstract translation: 提供了非易失性存储器系统和管理其功率的方法。 非易失性存储器系统包括非易失性存储器，其被配置为存储第一映射表，其包括与逻辑地址相对应的逻辑地址和物理地址的列表以及逻辑地址和列表 对应于与通用（GP）区域的逻辑地址相对应的物理地址;以及控制器，被配置为将第一映射表从非易失性存储器加载到第一存储器，并从非易失性存储器加载第二映射表 到第二个记忆。 关于非易失性存储器系统的上电，第二存储器的上电延迟，并且如果满足条件，则第一或第二存储器断电，使得非易失性存储器系统的功耗减少 。
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公开(公告)号：US09817596B2
公开(公告)日：2017-11-14
申请号：US15270513
申请日：2016-09-20
Applicant: Samsung Electronics Co., Ltd.
Inventor： Jae-Hyeon Ju , Young Joon Choi , Han Gu Sohn , Hyo Jin Jeong
CPC classification number: G06F3/0625 , G06F3/0634 , G06F3/0655 , G06F3/0679 , G06F12/0246 , G06F12/0292 , G06F2212/1028 , G11C7/1072 , Y02D10/13
Abstract: A non-volatile memory system and a method of managing the power of the same are provided. The non-volatile memory system includes a non-volatile memory configured to store a first mapping table comprising a list of a logical address and a physical address corresponding to the logical address with respect to a code region and a list of a logical address and a physical address corresponding to the logical address with respect to a general purpose (GP) region, and a controller configured to load the first mapping table from the non-volatile memory to a first memory and load the second mapping table from the non-volatile memory to a second memory. Power-up of the second memory is delayed with respect to power-up of the non-volatile memory system and the first or second memory is powered down if a condition is satisfied, so that power consumption of the non-volatile memory system is reduced.
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公开(公告)号：US09465553B2
公开(公告)日：2016-10-11
申请号：US14813291
申请日：2015-07-30
Applicant: Samsung Electronics Co., Ltd.
Inventor： Jae-Hyeon Ju , Young Joon Choi , Han Gu Sohn , Hyo Jin Jeong
CPC classification number: G06F3/0625 , G06F3/0634 , G06F3/0655 , G06F3/0679 , G06F12/0246 , G06F12/0292 , G06F2212/1028 , G11C7/1072 , Y02D10/13
Abstract: A non-volatile memory system and a method of managing the power of the same are provided. The non-volatile memory system includes a non-volatile memory configured to store a first mapping table comprising a list of a logical address and a physical address corresponding to the logical address with respect to a code region and a list of a logical address and a physical address corresponding to the logical address with respect to a general purpose (GP) region, and a controller configured to load the first mapping table from the non-volatile memory to a first memory and load the second mapping table from the non-volatile memory to a second memory. Power-up of the second memory is delayed with respect to power-up of the non-volatile memory system and the first or second memory is powered down if a condition is satisfied, so that power consumption of the non-volatile memory system is reduced.
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