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公开(公告)号:US20220223555A1
公开(公告)日:2022-07-14
申请号:US17709856
申请日:2022-03-31
发明人: Hyungjun JEON , Kwangjin MOON , Hakseung LEE , Hyoukyung CHO
IPC分类号: H01L23/00 , H01L25/065 , H01L21/683 , H01L21/78 , H01L25/00
摘要: A semiconductor stack and a method for manufacturing the same are disclosed. The semiconductor stack includes a lower chip, an upper chip disposed over the lower chip, an upper lateral-side passivation layer surrounding side surfaces of the upper chip, and a plurality of bonding pads and a bonding passivation layer disposed between the upper chip and the lower chip.
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公开(公告)号:US20220037235A1
公开(公告)日:2022-02-03
申请号:US17185166
申请日:2021-02-25
发明人: Hakseung LEE , Kwangjin MOON , Hyungjun JEON , Hyoukyung CHO
IPC分类号: H01L23/48 , H01L23/522 , H01L23/528 , H01L23/00
摘要: A semiconductor device may include a substrate including a first surface and a second surface, which are opposite to each other, an insulating layer on the first surface of the substrate, a first via structure and a second via structure penetrating the substrate and a portion of the insulating layer and having different widths from each other in a direction parallel to the first surface of the substrate, metal lines provided in the insulating layer, and an integrated circuit provided on the first surface of the substrate. A bottom surface of the first via structure may be located at a level lower than a bottom surface of the second via structure, when measured from the first surface of the substrate. The second via structure may be electrically connected to the integrated circuit through the metal lines.
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公开(公告)号:US20240274509A1
公开(公告)日:2024-08-15
申请号:US18610651
申请日:2024-03-20
发明人: Hyoukyung CHO , Hojin LEE , Kwangjin MOON
IPC分类号: H01L23/48 , H01L21/762 , H01L21/768 , H01L25/065 , H01L29/06
CPC分类号: H01L23/481 , H01L21/76224 , H01L21/76816 , H01L21/76898 , H01L25/0657 , H01L29/0649 , H01L2225/06544
摘要: A semiconductor device includes: a semiconductor substrate having opposing first side and second sides; an active region and an isolation region on the first side; a circuit device on the active region; a front side interconnection structure on the first side and including front side interconnection layers disposed on different levels; first and second back side interconnection structures below the second side; a buried structure having a portion disposed in the isolation region and including a conductive line; a first through-electrode structure including a first through-electrode contacting the conductive line and penetrating the semiconductor substrate between the conductive line and the first back side interconnection structure; and a second through-electrode structure including a second through-electrode penetrating the semiconductor substrate between a first front side interconnection layer and the second back side interconnection structure. The first front side interconnection layer is on a level higher than that of the conductive line.
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公开(公告)号:US20220399251A1
公开(公告)日:2022-12-15
申请号:US17708137
申请日:2022-03-30
发明人: Hyoukyung CHO , Hojin LEE , Kwangjin MOON
IPC分类号: H01L23/48 , H01L21/768 , H01L25/065 , H01L21/762 , H01L29/06
摘要: A semiconductor device includes: a semiconductor substrate having opposing first side and second sides; an active region and an isolation region on the first side; a circuit device on the active region; a front side interconnection structure on the first side and including front side interconnection layers disposed on different levels; first and second back side interconnection structures below the second side; a buried structure having a portion disposed in the isolation region and including a conductive line; a first through-electrode structure including a first through-electrode contacting the conductive line and penetrating the semiconductor substrate between the conductive line and the first back side interconnection structure; and a second through-electrode structure including a second through-electrode penetrating the semiconductor substrate between a first front side interconnection layer and the second back side interconnection structure. The first front side interconnection layer is on a level higher than that of the conductive line.
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公开(公告)号:US20210305186A1
公开(公告)日:2021-09-30
申请号:US17035215
申请日:2020-09-28
发明人: Hyungjun JEON , Kwangjin MOON , Hakseung LEE , Hyoukyung CHO
IPC分类号: H01L23/00 , H01L25/065 , H01L21/683 , H01L21/78 , H01L25/00
摘要: A semiconductor stack and a method for manufacturing the same are disclosed. The semiconductor stack includes a lower chip, an upper chip disposed over the lower chip, an upper lateral-side passivation layer surrounding side surfaces of the upper chip, and a plurality of bonding pads and a bonding passivation layer disposed between the upper chip and the lower chip.
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