Display screen or portion thereof with graphical user interface

    公开(公告)号:USD1020798S1

    公开(公告)日:2024-04-02

    申请号:US29897309

    申请日:2023-07-13

    Abstract: The FIGURE is a front view of a display screen or portion thereof with graphical user interface, showing our new design.
    The outer perimeter broken lines in the FIGURE depict a display screen or portion thereof and form no part of the claimed design. The remaining broken lines in the FIGURE depict portions of the graphical user interface that form no part of the claimed design.

    Display screen or portion thereof with graphical user interface

    公开(公告)号:USD1016852S1

    公开(公告)日:2024-03-05

    申请号:US29782867

    申请日:2021-05-10

    Abstract: The FIGURE is a front view of a display screen or portion thereof with graphical user interface, showing our new design.
    The outer perimeter broken lines in the FIGURE depict a display screen or portion thereof and form no part of the claimed design. The remaining broken lines in the FIGURE depict portions of the graphical user interface that form no part of the claimed design.

    SEMICONDUCTOR DEVICE
    3.
    发明公开

    公开(公告)号:US20230396160A1

    公开(公告)日:2023-12-07

    申请号:US18097226

    申请日:2023-01-14

    CPC classification number: H02M3/07 G11C5/147 G11C16/08 G11C16/14 G11C16/30

    Abstract: A semiconductor device includes a plurality of memory cells, and a peripheral circuit configured to control the plurality of memory cells. The peripheral circuit includes a temperature compensation circuit configured to output a compensation current determined based on a temperature of the semiconductor device, a voltage regulator configured to regulate a pump voltage having a level determined based on the compensation current, a clock generator configured to generate a clock signal having a frequency determined based on the compensation current; and a charge pump circuit including a level shifter, configured to output a control signal adjusted a swing level of the control signal based on the clock signal and the pump voltage, and a plurality of unit circuits, each of the plurality of unit circuits including a plurality of pumping capacitors configured to be charged and discharged by the control signal.

    Non-volatile memory device including high voltage switching circuit, and operation method of the non-volatile memory device

    公开(公告)号:US11587622B2

    公开(公告)日:2023-02-21

    申请号:US17326397

    申请日:2021-05-21

    Abstract: A memory device includes a memory cell array, a voltage switching circuit configured to switch a plurality of voltages provided to the memory cell array in response to a switching control signal, a discharge circuit configured to discharge the voltage switching circuit in response to a discharge signal, and a control circuit configured to generate the switching control signal based on a command and a high voltage enable signal received from outside of the memory device. The voltage switching circuit includes a high voltage switching circuit, and a low voltage switching circuit. The control circuit is configured to generate the discharge signal based on the command and an activated high voltage enable signal responsive to detecting external abortion while performing an operation corresponding to the command from among a program operation and an erase operation.

    Semiconductor device
    6.
    发明授权

    公开(公告)号:US12191763B2

    公开(公告)日:2025-01-07

    申请号:US18097226

    申请日:2023-01-14

    Abstract: A semiconductor device includes a plurality of memory cells, and a peripheral circuit configured to control the plurality of memory cells. The peripheral circuit includes a temperature compensation circuit configured to output a compensation current determined based on a temperature of the semiconductor device, a voltage regulator configured to regulate a pump voltage having a level determined based on the compensation current, a clock generator configured to generate a clock signal having a frequency determined based on the compensation current; and a charge pump circuit including a level shifter, configured to output a control signal adjusted a swing level of the control signal based on the clock signal and the pump voltage, and a plurality of unit circuits, each of the plurality of unit circuits including a plurality of pumping capacitors configured to be charged and discharged by the control signal.

    NON-VOLATILE MEMORY DEVICE INCLUDING HIGH VOLTAGE SWITCHING CIRCUIT, AND OPERATION METHOD OF THE NON-VOLATILE MEMORY DEVICE

    公开(公告)号:US20210391015A1

    公开(公告)日:2021-12-16

    申请号:US17326397

    申请日:2021-05-21

    Abstract: A memory device includes a memory cell array, a voltage switching circuit configured to switch a plurality of voltages provided to the memory cell array in response to a switching control signal, a discharge circuit configured to discharge the voltage switching circuit in response to a discharge signal, and a control circuit configured to generate the switching control signal based on a command and a high voltage enable signal received from outside of the memory device. The voltage switching circuit includes a high voltage switching circuit, and a low voltage switching circuit. The control circuit is configured to generate the discharge signal based on the command and an activated high voltage enable signal responsive to detecting external abortion while performing an operation corresponding to the command from among a program operation and an erase operation.

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