公开(公告)号：US20230044214A1

公开(公告)日：2023-02-09

申请号：US17692458

申请日：2022-03-11

Applicant: Samsung Electronics Co., Ltd.

Inventor： Youngsik MOON ,  Jiyoup KIM ,  Hongrak SON ,  Dongmin SHIN ,  Junho SHIN ,  Jaehun JANG

IPC: G06F21/60 ,  G06F21/79 ,  G06F13/16 ,  H04L9/00 ,  H04L9/08

Abstract: A method of transmitting data in a storage device includes encrypting original data based on a homomorphic encryption algorithm to generate encrypted data, generating a parameter for regeneration of a ciphertext higher than an operation level of the encrypted data by using the encrypted data and a key value, and transmitting the encrypted data and the parameter to an external host device.

公开(公告)号：US20210344479A1

公开(公告)日：2021-11-04

申请号：US17115161

申请日：2020-12-08

Applicant: Samsung Electronics Co., Ltd.

Inventor： Wijik LEE ,  Youngsik MOON ,  Hongrak SON ,  Jaehun JANG

IPC: H04L9/00 ,  H04L9/14 ,  H04L9/30

Abstract: A homomorphic encryption processing device includes the processing circuitry is configured to generate ciphertext operation level information based on field information. The field information represents a technology field to which homomorphic encryption processing is applied. The ciphertext operation level information represents a maximum number of multiplication operations between homomorphic ciphertexts without a bootstrapping process. The processing circuitry is further configured to select and output a homomorphic encryption parameter based on the ciphertext operation level information. The processing circuitry is further configured to perform one of a homomorphic encryption, a homomorphic decryption and a homomorphic operation, based on the homomorphic encryption parameter. The homomorphic encryption processing device may adaptively generate a homomorphic encryption parameter according to a ciphertext operation level information determined based on a field information, and may perform a homomorphic encryption, a homomorphic decryption and a homomorphic operation based on the homomorphic encryption parameter.

公开(公告)号：US20210160109A1

公开(公告)日：2021-05-27

申请号：US16911801

申请日：2020-06-25

Applicant: Samsung Electronics Co., Ltd.

Inventor： Changkyu SEOL ,  Hongrak SON ,  Geunyeong YU ,  Pilsang YOON ,  Jaehun JANG

IPC: H04L27/04 ,  H04L27/06 ,  H04L1/00

Abstract: A neuromorphic device includes a neuron block, a spike transmission circuit and a spike reception circuit. The neuron block includes a plurality of neurons connected by a plurality of synapses to perform generation and operation of spikes. The spike transmission circuit generates a non-binary transmission signal based on a plurality of transmission spike signals output from the neuron block and transmits the non-binary transmission signal to a transfer channel, where the non-binary transmission signal includes information on transmission spikes included in the plurality of transmission spike signals. The spike reception circuit receives a non-binary reception signal from the transfer channel and generates a plurality of reception spike signals including reception spikes based on the non-binary reception signal to provide the plurality of reception spike signals to the neuron block, where the non-binary reception signal includes information on the reception spikes.

公开(公告)号：US20250021431A1

公开(公告)日：2025-01-16

申请号：US18635073

申请日：2024-04-15

Applicant: SAMSUNG ELECTRONICS CO., LTD.

Inventor： Junho SHIN ,  Hanbyeul NA ,  Jaehun JANG ,  Mankeun SEO ,  Dongmin SHIN

IPC: G06F11/10

Abstract: A memory controller including: a data formatter receiving first to N-th hard decision data and first to N-th soft decision data, and performing a formatting operation on the first to N-th hard decision data and the first to N-th soft decision data; and an error correction code (ECC) circuit receiving the first to N-th hard decision data and the first to N-th soft decision data from the data formatter and correcting an error on the first page by ECC decoding processing, wherein the data formatter performs the formatting operation such that the first to N-th hard decision data and the first to N-th soft decision data are provided to the ECC circuit in an order different from an order of the first to N-th hard decision data and the first to N-th soft decision data were received from the memory device.

公开(公告)号：US20210224638A1

公开(公告)日：2021-07-22

申请号：US17002035

申请日：2020-08-25

Applicant: Samsung Electronics Co., Ltd.

Inventor： Jaehun JANG ,  Hongrak SON

IPC: G06N3/063 ,  G06F12/06 ,  G06N3/08 ,  G06N3/04

Abstract: A storage controller includes a learning pattern processor and a storage processor. The learning pattern processor estimates request prediction data to be requested by a host per epoch to generate estimated result values of the request prediction data. The storage processor reads the request prediction data from a storage memory to store the request prediction data in a buffer memory based on the estimated result values before the host issues a read request for the request prediction data. An operation speed of the buffer memory is higher than an operation speed of the storage memory.

公开(公告)号：US20210150321A1

公开(公告)日：2021-05-20

申请号：US16906209

申请日：2020-06-19

Applicant: Samsung Electronics Co., Ltd.

Inventor： Jaehun JANG ,  Hongrak SON ,  Changkyu SEOL ,  Hyejeong SO ,  Hwaseok OH ,  Pilsang YOON ,  Jinsoo LIM

IPC: G06N3/063 ,  G06N3/08 ,  G06F7/544 ,  G06F15/80

Abstract: A storage system includes a host device and a storage device. The host device provides first input data for data storage function and second input data for artificial intelligence (AI) function. The storage device stores the first input data from the host device, and performs AI calculation based on the second input data to generate calculation result data. The storage device includes a first processor, a first nonvolatile memory, a second processor and a second nonvolatile memory. The first processor controls an operation of the storage device. The first nonvolatile memory stores the first input data. The second processor performs the AI calculation, and is distinguished from the first processor. The second nonvolatile memory stores weight data associated with the AI calculation, and is distinguished from the first nonvolatile memory.