公开(公告)号：US20240071921A1

公开(公告)日：2024-02-29

申请号：US18142795

申请日：2023-05-03

Applicant: SAMSUNG ELECTRONICS CO., LTD.

Inventor： Minkyu CHUNG ,  Sangjae LEE ,  Seungyoon KIM ,  Jaehwang SIM

IPC: H01L23/528 ,  H01L23/522 ,  H01L25/065

CPC classification number: H01L23/5283 ,  H01L23/5226 ,  H01L25/0652 ,  H10B41/27 ,  H10B41/35 ,  H10B41/40 ,  H10B43/27 ,  H10B43/35 ,  H10B43/40 ,  H10B80/00

Abstract: A semiconductor device may include a first structure, a second structure on the first structure, and gate contact plugs penetrating through the first and second structures. The first structure may include a first stack structure including first gate layers and first insulating layers alternately stacked, a first pad capping pattern penetrating through at least a first portion of the first stack structure, and a first buffer capping pattern penetrating through at least a second portion of the first stack structure and spaced apart from the first pad capping pattern. The second structure may include a second stack structure including second gate layers and second insulating layers alternately stacked, and a second pad capping pattern penetrating through at least a portion of the second stack structure. The first gate layers may include first gate pads covered by the first pad capping pattern.

公开(公告)号：US20250089252A1

公开(公告)日：2025-03-13

申请号：US18820966

申请日：2024-08-30

Applicant: Samsung Electronics Co., Ltd.

Inventor： Jongseon AHN ,  Hyunju KIM ,  Jaehwang SIM ,  Seulbi LEE

IPC: H10B43/27

Abstract: A semiconductor device includes a gate electrode structure, a memory channel structure, and a contact plug. The gate electrode structure includes gate electrodes sequentially stacked and spaced apart from each other on a substrate in a first direction perpendicular to an upper surface of the substrate. Each of the gate electrodes extends in a second direction substantially parallel to the upper surface of the substrate. The memory channel structure extends through the gate electrode structure. The contact plug extends partially through the gate electrode structure to contact an upper surface of a first gate electrode among the gate electrodes. The contact plug is electrically insulated from a second gate electrode that is over the first gate electrode. At least a portion of the contact plug has a width decreasing from a top toward a bottom thereof in the first direction in a stepwise manner.