Wearable electronic device including band

    公开(公告)号:US10528006B2

    公开(公告)日:2020-01-07

    申请号:US16139362

    申请日:2018-09-24

    Abstract: A wearable electronic device may include: a housing including a front plate, a rear plate, and a side member surrounding an inner space between the front plate and the rear plate, wherein the side member includes at least one portion including an external opening and an inner channel connecting between the inner space and the external opening: an insulating structure inserted into the inner channel; a conductive path partially embedded in the insulating structure, wherein the conductive path includes a first end exposed to the inner space and a second end exposed to the external opening; at least one printed circuit board positioned in the inner space and electrically connected to the first end of the conductive path; a display exposed through the front plate; and a band structure connected to the portion of the housing and configured to be mounted on a portion of a human body. The band structure may include a conductive rod movably inserted into the external opening and electrically connected to the second end of the conductive path, and an electronic component at least partially embedded in the band structure and electrically connected to the conductive rod. Other various embodiments may also exist.

    MEMORY STORAGE DEVICE AND ELECTRONIC DEVICE INCLUDING A NONVOLATILE MEMORY

    公开(公告)号:US20230195344A1

    公开(公告)日:2023-06-22

    申请号:US17937068

    申请日:2022-09-30

    Abstract: A memory storage device includes a non-volatile memory including a plurality of memory blocks and a memory controller configured to control the non-volatile memory, wherein the memory controller is configured to provide host data including write data to the non-volatile memory, wherein the memory controller is configured to perform a garbage collection operation on the memory blocks to provide garbage collection data to the non-volatile memory when a free block count of the memory blocks is smaller than a first threshold value, and wherein the memory controller is configured to increase a capacity for providing the host data when the free block count of the memory blocks is greater than a second threshold value less than the first threshold value and a valid page count of the first memory block among the memory blocks is less than a third threshold value.

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