公开(公告)号：US20250151441A1

公开(公告)日：2025-05-08

申请号：US18809676

申请日：2024-08-20

Applicant: Samsung Electronics Co., Ltd.

Inventor： Changkyu Lee ,  Jinyoung Kim ,  Byoungho Kwon ,  Dhami Park ,  Jihun Lim

IPC: H01L27/146

Abstract: An image sensor includes a substrate, a first pixel disposed in the substrate, the first pixel including a first photoelectric conversion region, a second pixel disposed adjacent to the first pixel in the substrate, the second pixel including a second photoelectric conversion region, a first floating diffusion region in the first pixel, a second floating diffusion region in the second pixel, an insulation layer on the substrate, and a first buried connect penetrating the insulation layer and connected to the first floating diffusion region and the second floating diffusion region, wherein the first buried connect includes an upper surface and a lower surface, the upper surface of the first buried connect is at a higher vertical level than an upper surface of the insulation layer, and the lower surface of the first buried connect is at a higher or equal vertical level than a lower surface of the insulation layer.

公开(公告)号：US20250006770A1

公开(公告)日：2025-01-02

申请号：US18735325

申请日：2024-06-06

Applicant: Samsung Electronics Co., Ltd.

Inventor： Jihun Lim ,  Jinyoung Kim ,  Myunghae Seo ,  Sungki Min ,  Chang Kyu Lee

IPC: H01L27/146

Abstract: A dual vertical transfer gate, a transistor including the same, and a CMOS image sensing device including the same. In some embodiments, a gate of the dual vertical transfer transistor may include a pair of poles, which are extended to an n-type region of a photodiode, and a connecting portion, which connects the paired poles to each other. A first insulating pattern may be provided between the poles and on the substrate.

公开(公告)号：US20250151426A1

公开(公告)日：2025-05-08

申请号：US18782845

申请日：2024-07-24

Applicant: Samsung Electronics Co., Ltd.

Inventor： Changkyu Lee ,  Jinyoung Kim ,  Byoungho Kwon ,  Jihun Lim

IPC: H01L27/146

Abstract: An image sensor includes a substrate, a unit pixel region in the substrate, the unit pixel region including a photoelectric conversion region, a pixel isolation structure defining the unit pixel region, a first insulation layer on a front-side surface of the substrate, and a dual transfer gate electrode including a first sub transfer gate electrode and a second sub transfer gate electrode adjacent to each other in a horizontal direction each passing through the first insulation layer and buried in the substrate, in the unit pixel region, wherein a lower surface of each of the first and the second sub transfer gate electrode is disposed at a lower vertical level than an upper surface of the first insulation layer, and at a higher or equal vertical level than a lower surface of the first insulation layer.