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公开(公告)号：US12131789B2
公开(公告)日：2024-10-29
申请号：US17847545
申请日：2022-06-23
发明人： Junho Kim , Jinyoung Kim , Sehwan Park , Seoyoung Lee , Jisang Lee , Joonsuc Jang
CPC分类号： G11C16/3459 , G11C16/08 , G11C16/102 , G11C16/26 , G11C16/3404
摘要： Aggressor memory cells connected to one or more aggressor wordlines are grouped into aggressor cell groups by performing a read operation with respect to the aggressor wordlines based on one or more grouping read voltages, where the aggressor wordlines are adjacent to a selected wordline corresponding to a read address among wordlines of a memory block. Selected memory cells connected to the selected wordline are grouped into a selected cell groups respectively corresponding to the aggressor cell groups. Group read conditions respectively corresponding to the selected cell groups are determined and group read operations are performed with respect to the plurality of selected cell groups based on the group read conditions. The read errors are reduced by grouping the selected memory cells into the selected cell groups according to the change of operation environments.
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公开(公告)号：US11868647B2
公开(公告)日：2024-01-09
申请号：US17522578
申请日：2021-11-09
发明人： Youngdeok Seo , Jinyoung Kim , Sehwan Park , Ilhan Park
IPC分类号： G06F3/06
CPC分类号： G06F3/0655 , G06F3/0604 , G06F3/0679
摘要： A nonvolatile memory device includes a memory block including a memory area, an on-chip valley search (OVS) circuit performing an OVS sensing operation on the memory block, and a buffer memory storing at least one variation table including variation information of a threshold voltage of memory cells, obtained from the OVS sensing operation. A reading operation including an OVS sensing operation and a main sensing operation on the memory area is performed in response to a read command applied by a memory controller, the OVS sensing operation is performed at an OVS sensing level, and the main sensing operation is performed at a main sensing level reflecting the variation information. In the nonvolatile memory device, correction accuracy for deterioration of a word line threshold voltage may be improved, and a burden on a memory controller may be reduced.
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公开(公告)号：US11763903B2
公开(公告)日：2023-09-19
申请号：US17498832
申请日：2021-10-12
发明人： Sehwan Park , Jinyoung Kim , Youngdeok Seo , Dongmin Shin
CPC分类号： G11C16/3459 , G11C7/1057 , G11C7/1084 , G11C11/54 , G11C16/0433 , G11C16/102 , G11C16/14 , G11C16/26 , G11C16/3445 , G11C16/3495
摘要： A nonvolatile memory device includes; a memory cell array including a meta data region storing chip-level information, control logic identifying a target cell in response to a command, machine learning (ML) logic inferring an optimum parameter based on the chip-level information and physical information associated with the target cell applied as inputs to an artificial neural network model, and a buffer memory configured to store weight parameters of the artificial neural network model.
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公开(公告)号：US11556415B2
公开(公告)日：2023-01-17
申请号：US17397321
申请日：2021-08-09
发明人： Sehwan Park , Jinyoung Kim , Ilhan Park , Youngdeok Seo
摘要： A memory device may determine cell count information from a threshold voltage distribution of memory cells and may determine a detection case based on the cell count information when an error in read data, received from the memory device performing a read operation is not corrected. A memory controller may control the memory device to execute a read operation using a development time determined in consideration of an offset voltage of a read voltage corresponding to the detection case. When an error in the read data is successfully corrected, the memory controller may update a table, stored in the memory controller, using a dynamic offset voltage obtained by inputting the cell count information to a machine learning model.
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公开(公告)号：US11475948B2
公开(公告)日：2022-10-18
申请号：US16999189
申请日：2020-08-21
发明人： Jongryul Kim , Jinyoung Kim , Taehui Na
摘要： A memory device and a method of operating the same. The memory device includes a memory cell array including a plurality of memory cells disposed in an area where a plurality of word lines and a plurality of bit lines cross each other; a row decoder including row switches and configured to perform a selection operation on the plurality of word lines; a column decoder including column switches and configured to perform a selection operation on the plurality of bit lines; and a control logic configured to control, in a data read operation, a precharge operation to be performed on a selected word line in a word line precharge period, and to control a precharge operation to be performed on a selected bit line in a bit line precharge period; wherein a row switch connected to the selected word line is weakly turned on in the bit line precharge period.
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公开(公告)号：US10739992B2
公开(公告)日：2020-08-11
申请号：US14812346
申请日：2015-07-29
发明人： Jinwan An , Jinyoung Kim , Yunjeong Choi , Yonggil Han
IPC分类号： G06F3/01 , G06F3/048 , G06F3/0484 , G06F3/0488 , G06F3/023
摘要： An electronic device and an operation method thereof are provided. The method includes displaying information on a touch screen of the electronic device by operating a first application, displaying user interface of a second application, detecting an input through the user interface, displaying at least one recommendation object corresponding to the input among the information on the touch screen, at least partly in response to the input, receiving an input of selecting at least one of the at least one recommendation object, and displaying the recommendation object on the user interface, in response to the selecting input.
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公开(公告)号：US20230411267A1
公开(公告)日：2023-12-21
申请号：US18128069
申请日：2023-03-29
发明人： Jiyeong Kim , Jinyoung Kim , Jihye Shim , Okseon Yoon
IPC分类号： H01L23/498 , H01L25/10 , H01L23/00
CPC分类号： H01L23/49838 , H01L23/49894 , H01L25/105 , H01L23/49816 , H01L24/08 , H01L24/16 , H01L2225/1041 , H01L2225/1058 , H01L2224/08235 , H01L2224/16235 , H01L2924/182
摘要： A semiconductor package includes a redistribution structure including a wiring structure and an insulating structure covering the wiring structure, the redistribution structure having a first surface and a second surface, which are opposite to each other, the insulating structure including a polymer, a semiconductor chip on the first surface, the semiconductor chip being connected to at least one first wiring pattern in the wiring structure, a passivation insulating film covering the second surface, the passivation insulating film including an inner surface contacting the insulating structure and a hole sidewall defining a hole, the passivation insulating film including an inorganic insulating material, a conductive pad passing through the passivation insulating film via the hole and contacting the second wiring pattern, the conductive pad having a pad sidewall contacting the hole sidewall, and an external connection terminal on the conductive pad.
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公开(公告)号：US11815982B2
公开(公告)日：2023-11-14
申请号：US17968912
申请日：2022-10-19
发明人： Wandong Kim , Jinyoung Kim , Sehwan Park , Hyun Seo , Sangwan Nam
CPC分类号： G06F11/0727 , G06F11/076 , G06F11/0757 , G11C16/0483 , G11C16/10 , G11C16/26 , G11C11/56 , G11C16/34
摘要： An operating method of a nonvolatile memory device for programming multi-page data, the operating method including: receiving the multi-page data from a memory controller; programming first page data among the multi-page data to first memory cells connected to a word line adjacent to a selected word line; reading previous page data previously stored in second memory cells connected to the selected word line based on a first sensing value and a second sensing value after programming the first page data; calculating a first fail bit number by comparing first bits of the previous page data read based on the first sensing value to second bits of the previous page data read based on the second sensing value; and programming the previous page data read from the second memory cells and second page data among the multi-page data to the second memory cells based on the first fail bit number.
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公开(公告)号：US11682467B2
公开(公告)日：2023-06-20
申请号：US17353583
申请日：2021-06-21
发明人： Jinyoung Kim , Sehwan Park , Youngdeok Seo , Ilhan Park
CPC分类号： G11C29/42 , G11C16/0433 , G11C16/08 , G11C16/24 , G11C16/26 , G11C16/3495 , G11C29/4401
摘要： A nonvolatile memory device includes a plurality of memory blocks and a control logic circuit configured to perform a first page on-chip valley search (OVS) operation on memory cells connected to one wordline of a memory block selected in response to an address, among the plurality of memory blocks, in response to a first read command. The control logic circuit is further configured to change a read level of at least one state using detection information of the first page OVS operation, and to perform a second page read operation on the memory cells using the changed read level in response to a second read command.
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公开(公告)号：US20230154841A1
公开(公告)日：2023-05-18
申请号：US17823634
申请日：2022-08-31
发明人： Okseon Yoon , Jiyeong Kim , Jinyoung Kim
IPC分类号： H01L23/498 , H01L25/18
CPC分类号： H01L23/49838 , H01L23/49822 , H01L25/18 , H01L24/16 , H01L2224/16145 , H01L2224/16227
摘要： A semiconductor package includes: a redistribution structure including a plurality of redistribution insulation layers, which are stacked, a plurality of redistribution line patterns on an upper surface and a lower surface of the plurality of redistribution insulation layers, and constituting a plurality of distribution layers at different vertical levels from each other, and a plurality of redistribution vias that penetrate at least one redistribution insulation layer of the plurality of redistribution insulation layers and are connected to some of the plurality of redistribution line patterns; and at least one semiconductor chip on the redistribution structure and electrically connected to the plurality of redistribution line patterns and the plurality of redistribution vias.
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