MEMORY CONTROLLER, MEMORY SYSTEM INCLUDING THE SAME AND METHOD OF OPERATING MEMORY CONTROLLER
    1.
    发明申请
    MEMORY CONTROLLER, MEMORY SYSTEM INCLUDING THE SAME AND METHOD OF OPERATING MEMORY CONTROLLER 有权
    存储器控制器,包括其的存储器系统和操作存储器控制器的方法

    公开(公告)号:US20150261250A1

    公开(公告)日:2015-09-17

    申请号:US14589660

    申请日:2015-01-05

    Inventor: Jin-Su JUNG

    Abstract: A memory controller includes a clock scaler, a bus component and a level monitor. The clock scaler is configured to receive a first clock signal and configured to generate a second clock signal based on the first clock signal, first and second frequency control signals. A frequency of the second clock signal may increase based on the first frequency control signal and decrease based on the second frequency control signal. The bus component may operate based on the second clock signal and generate a level signal corresponding to a current operating state of the bus component. The level monitor may generate the first and second frequency control signals based on the level signal, a first threshold value, a second threshold value, a first reference time, and a second reference time.

    Abstract translation: 存储器控制器包括时钟缩放器,总线组件和电平监视器。 时钟缩放器被配置为接收第一时钟信号并被配置为基于第一时钟信号,第一和第二频率控制信号产生第二时钟信号。 第二时钟信号的频率可以基于第一频率控制信号而增加,并且基于第二频率控制信号而减小。 总线部件可以基于第二时钟信号操作,并且产生对应于总线部件的当前工作状态的电平信号。 电平监视器可以基于电平信号,第一阈值,第二阈值,第一参考时间和第二参考时间来生成第一和第二频率控制信号。

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