公开(公告)号：US10546869B2

公开(公告)日：2020-01-28

申请号：US15800545

申请日：2017-11-01

Applicant: Samsung Electronics Co., Ltd.

Inventor： Taekeun Cho ,  Hongsoo Kim ,  Jong-Kook Park ,  TaeHee Lee

IPC: H01L27/11573 ,  H01L27/11519 ,  H01L27/11529 ,  H01L27/11524 ,  H01L23/522 ,  H01L27/11578 ,  H01L27/11565 ,  H01L27/11575 ,  H01L27/11582

Abstract: A semiconductor device comprises a plurality of stack structures that include gate electrodes sequentially stacked on a substrate and are disposed along a first direction, and a plurality of separating insulation layers each of which is disposed between the stack structures. A plurality of vertical pillars penetrate each of the stack structures and are connected to the substrate. A plurality of bit lines are disposed on the vertical pillars and run across the stack structures in the first direction. A plurality of bit line contact structures connect the vertical pillars to the bit lines. A plurality of first cell dummy lines are disposed on the plurality of separating insulation layers and extend in a second direction crossing the first direction.

公开(公告)号：US20180261616A1

公开(公告)日：2018-09-13

申请号：US15800545

申请日：2017-11-01

Applicant: Samsung Electronics Co., Ltd.

Inventor： Taekeun Cho ,  Hongsoo Kim ,  Jong-Kook Park ,  TaeHee Lee

IPC: H01L27/11573 ,  H01L27/11519 ,  H01L27/11529 ,  H01L27/11524 ,  H01L27/11578 ,  H01L23/522

CPC classification number: H01L27/11573 ,  H01L23/522 ,  H01L27/11519 ,  H01L27/11524 ,  H01L27/11529 ,  H01L27/11565 ,  H01L27/11575 ,  H01L27/11578 ,  H01L27/11582

Abstract: A semiconductor device comprises a plurality of stack structures that include gate electrodes sequentially stacked on a substrate and are disposed along a first direction, and a plurality of separating insulation layers each of which is disposed between the stack structures. A plurality of vertical pillars penetrate each of the stack structures and are connected to the substrate. A plurality of bit lines are disposed on the vertical pillars and run across the stack structures in the first direction. A plurality of bit line contact structures connect the vertical pillars to the bit lines. A plurality of first cell dummy lines are disposed on the plurality of separating insulation layers and extend in a second direction crossing the first direction.

公开(公告)号：US09287265B2

公开(公告)日：2016-03-15

申请号：US14295333

申请日：2014-06-04

Applicant: Samsung Electronics Co., Ltd.

Inventor： Jong-Kook Park ,  Hongsoo Kim ,  Won-Chul Jang

IPC: H01L27/105 ,  H01L27/06 ,  H01L23/485

CPC classification number: H01L27/105 ,  H01L23/485 ,  H01L2924/0002 ,  H01L2924/00

Abstract: A semiconductor device includes a substrate with an active region defined by a device isolation layer. A word line extends over the active region in a first direction, and a plurality of interconnections extends over the word line in a second direction perpendicular to the first direction. A contact pad is disposed between and spaced apart from the word line and the plurality of interconnections, extending in the first direction to overlap the plurality of interconnections and the active region when viewed from a plan view. A lower contact plug electrically connects the contact pad to the active region. An upper contact plug electrically connects the contact pad to one of the plurality of interconnections.

Abstract translation: 半导体器件包括具有由器件隔离层限定的有源区的衬底。 字线在第一方向上在有源区域上延伸，并且多个互连在垂直于第一方向的第二方向上在字线上延伸。 接触垫设置在字线和多个互连之间并与之隔开的多个互连，当从平面图观察时，沿第一方向延伸以与多个互连和有源区重叠。 下接触插头将接触垫电连接到有源区域。 上接触插头将接触垫电连接到多个互连中的一个。