公开(公告)号：US09513333B2

公开(公告)日：2016-12-06

申请号：US14458241

申请日：2014-08-12

Applicant: Samsung Electronics Co., Ltd.

Inventor： Ki-Jae Song ,  Jong-woon Yoo

IPC: G01R31/00 ,  G01R31/30 ,  G01R31/28 ,  G11C29/56 ,  G11C5/14

CPC classification number: G01R31/3004 ,  G01R31/2839 ,  G01R31/2889 ,  G11C5/147 ,  G11C29/56 ,  G11C2029/5602

Abstract: A test interface board includes a substrate including a power plane electrically connected to at least one power terminal of a semiconductor device under test, and a ground plane electrically connected to at least one ground terminal of the semiconductor device under test, and a voltage regulator arranged on the substrate and configured to supply, via the power plane and the ground plane, to the semiconductor device under test, a driving voltage.

Abstract translation: 测试接口板包括：基板，包括电连接到被测半导体器件的至少一个电源端子的电源平面;以及电连接到被测半导体器件的至少一个接地端子的接地平面;以及电压调节器， 在基板上并经配置以经由电源平面和接地平面向被测半导体器件提供驱动电压。