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Patent Agency Ranking
公开(公告)号：US20250070729A1
公开(公告)日：2025-02-27
申请号：US18780949
申请日：2024-07-23
Applicant: Samsung Electronics Co., Ltd.
Inventor： Wooseok LEE , Minchul KANG , Sangmin YOO , Jeongyeol BAE , Jongsoo LEE
Abstract: Disclosed is a transmitter. The transmitter includes a plurality of power amplifiers, each of the plurality of power amplifiers being configured to receive an RF input signal, a parallel power combiner configured to combine outputs of the plurality of power amplifiers to generate an RF output signal, a supply voltage switch configured to provide one supply voltage to the plurality of power amplifiers, the one supply voltage being selected from among a plurality of supply voltages of different voltage levels, and a controller configured to control an output power of the RF output signal by selecting the one supply voltage from among the plurality of supply voltages, and controlling whether to activate each of the plurality of power amplifiers.
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公开(公告)号：US20250069794A1
公开(公告)日：2025-02-27
申请号：US18809893
申请日：2024-08-20
Applicant: Samsung Electronics Co., Ltd.
Inventor： Wooseok LEE , Sangmin YOO , Jeongyeol BAE , Jongsoo LEE , Soyeon KIM
Abstract: A switchable coil includes a first coil including a first outer coil and a first inner coil, the first inner coil and the first outer coil forming a first crossing-region, a second coil including a second outer coil and a second inner coil, the second inner coil and the second outer coil forming a second crossing-region, and the second crossing-region being inside the first inner coil viewed in a first direction, and a switch connected to a region facing the second crossing-region in the second inner coil.
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公开(公告)号：US20250070759A1
公开(公告)日：2025-02-27
申请号：US18810639
申请日：2024-08-21
Applicant: Samsung Electronics Co., Ltd.
Inventor： Bosung SUH , Byoungjoong KANG , Heeyong YOO , Beomyu PARK , Jeongyeol BAE , Sangmin YOO , Jongsoo LEE
Abstract: An electronic device includes an amplifier circuit configured to amplify a radio frequency (RF) signal received from an antenna, the RF signal having a receiving power, an attenuator circuit connected between the amplifier circuit and a mixer, the attenuator circuit including at least one resistor and at least one transistor, and a processor configured to turn on a first transistor among the at least one transistor based on the receiving power being less than a threshold value, a signal output from the amplifier circuit being directly transferred to the mixer based on the first transistor being turned on, and control one or more transistors among the at least one transistor using a look-up table based on the receiving power being greater than or equal to the threshold value, the attenuator circuit having a resistance value corresponding to the receiving power based on the control of the one or more transistors.
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公开(公告)号：US20240120957A1
公开(公告)日：2024-04-11
申请号：US18356308
申请日：2023-07-21
Applicant: Samsung Electronics Co., Ltd.
Inventor： Joonggeun LEE , Daechul JEONG , Jeongyeol BAE , Jongsoo LEE , Sangmin YOO
CPC classification number: H04B1/0458 , H03F3/195 , H03F3/245 , H04B2001/0416
Abstract: A radio-frequency (RF) chip includes a mixer configured to mix a local oscillation signal with a baseband signal to output an RF signal, an amplification stage configured to amplify the RF signal through a plurality of unit amplifiers operating in response to a first control signal, and a compensation capacitor bank provided between the mixer and the amplification stage. The compensation capacitor bank is configured to adjust a capacitance of the compensation capacitor bank based on a second control signal, the second control signal being complementary to the first control signal.
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公开(公告)号：US20220069822A1
公开(公告)日：2022-03-03
申请号：US17353917
申请日：2021-06-22
Applicant: SAMSUNG ELECTRONICS CO., LTD.
Inventor： Byongmo MOON , Jiyoung KIM , Seongook JUNG , Jongsoo LEE
IPC: H03K19/173 , H03K19/0175 , H03K19/017 , H03K19/17788 , G11C7/14 , G11C7/22
Abstract: A transmitter includes a multiplexer, control logic and a voltage mode driver. The multiplexer generates a plurality of time-interleaved data signals based on a plurality of input data signals and multi-phase clock signals. The plurality of input data signals are input in parallel. Each of the plurality of input data signals is a binary signal and has two voltage levels that are different from each other. The control logic generates at least one pull-down control signal and a plurality of pull-up control signals based on the plurality of time-interleaved data signals. Each of the plurality of pull-up control signals has a voltage level that is temporarily boosted. The voltage mode driver generates an output data signal based on the at least one pull-down control signal and the plurality of pull-up control signals. The output data signal is a duobinary signal and has three voltage levels that are different from each other.
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