公开(公告)号：US11901187B2

公开(公告)日：2024-02-13

申请号：US17522193

申请日：2021-11-09

Applicant: Samsung Electronics Co., Ltd.

Inventor： Hwanyeol Park ,  Jongyoung Park ,  Yongdeok Lee ,  Sejin Kyung ,  Daewee Kong ,  Ilwoo Kim ,  Songyi Baek ,  Philippe Coche

IPC: H01L21/308 ,  H01L21/768 ,  H01L21/02 ,  H01L29/06 ,  H01L49/02

CPC classification number: H01L21/3086 ,  H01L21/02129 ,  H01L21/76829 ,  H01L28/40 ,  H01L28/60 ,  H01L29/06

Abstract: Provided is a semiconductor device. The semiconductor device includes a wafer; an etch stop layer on the wafer; a lower mold layer on the etch stop layer; an intermediate supporter layer on the lower mold layer; an upper mold layer on the intermediate supporter layer; an upper supporter layer on the upper mold layer; and a hard mask structure on the upper supporter layer, wherein the hard mask structure includes a first hard mask layer on the upper supporter layer and a second hard mask layer on the first hard mask layer, one of the first hard mask layer and the second hard mask layer includes a first organic layer including a SOH containing C, H, O, and N, and the other one of the first hard mask layer and the second hard mask layer includes a second organic layer including an SOH containing C, H, and O.

公开(公告)号：US20240090199A1

公开(公告)日：2024-03-14

申请号：US18233061

申请日：2023-08-11

Applicant: SAMSUNG ELECTRONICS CO., LTD.

Inventor： Jingyu Park ,  Jongyoung Park ,  Taeyoung Koh ,  Kiyong Kim ,  Sundoo Kim ,  Jaehyun Kim

IPC: H10B12/00

CPC classification number: H10B12/315 ,  H10B12/34 ,  H10B12/482

Abstract: A semiconductor device includes a first active pattern on a substrate, the first active pattern extending in a third direction having an acute angle with respect to a first direction and a second direction, the first direction and the second direction being substantially parallel to an upper surface of the substrate and substantially perpendicular to each other, a first conductive filling pattern on an upper surface of a central portion of the first active pattern, the first conductive filling pattern having a shape of a parallelogram, a gate structure extending in the first direction in an upper portion of the first active pattern, and a bit line structure on the first conductive filling pattern and extending in the second direction.