公开(公告)号：US10128822B2

公开(公告)日：2018-11-13

申请号：US15405893

申请日：2017-01-13

Applicant: Samsung Electronics Co., Ltd.

Inventor： Jun Han Bae ,  Jae Hyun Park ,  Jong Shin Shin ,  Jin Ho Han

IPC: H03B1/00 ,  H03K3/00 ,  H03K5/04

Abstract: An integrated circuit includes a differential signal driver that receives a first signal from a first input terminal, receives a second signal, which is a differential signal of the first signal, from a second input terminal, outputs a first output signal corresponding to the first signal to a first output terminal, and outputs a second output signal corresponding to the second signal to a second output terminal. The integrated circuit further includes a first capacitor unit connected to the first output terminal and controlling a slew rate of the first output signal based on a first capacitance, a second capacitor unit connected to the second output terminal and controlling a slew rate of the second output signal based on a second capacitance, and a phase selection unit that receives the first signal and provides the first signal to the second capacitor unit, and that receives the second signal and provides the second signal to the first capacitor unit, so as to control the slew rates of the first and second output signals.

公开(公告)号：US11522736B2

公开(公告)日：2022-12-06

申请号：US17461070

申请日：2021-08-30

Applicant: Samsung Electronics Co., Ltd.

Inventor： Byeong Gyu Park ,  Jun Han Bae ,  Yun Geun Nam ,  Jae Hyun Park ,  Gyeong Seok Song ,  Ho-Bin Song

IPC: H04L25/03 ,  H03F3/45 ,  H04B1/18 ,  H04B3/08

Abstract: An analog front-end receiver including a termination resistor configured to receive first and second differential signals from different data lines, the second differential signal being differential with respect to the first differential signal, an active equalizer configured to receive a first input differential signal through a first input node and a second input differential signal through a second input node, the first and second input differential signals both having an input common mode voltage, the first and second input differential signals being based on the first and second differential signal, respectively, and output first and output differential signals to first and second output nodes, respectfully, the second output differential signal being differential with respect to the first output differential signal, and an input common mode voltage generator configured to adjust the input common mode voltage to be equal to an output common mode voltage of the first output differential signal.

公开(公告)号：US11901967B2

公开(公告)日：2024-02-13

申请号：US17380779

申请日：2021-07-20

Applicant: SAMSUNG ELECTRONICS CO., LTD.

Inventor： Byeong Gyu Park ,  Jae Hyun Park ,  Jun Han Bae ,  Ho-Bin Song

IPC: H04B3/14

CPC classification number: H04B3/14

Abstract: Provided is an analog front-end receiver including: a first equalizer including a first block switch configured to receive a first differential signal through a first node, and configured to block the first differential signal in a first operation mode; a second equalizer including a second block switch configured to receive a second differential signal through a second node, and configured to block the second differential signal in the first operation mode; a terminating resistor provided between the first node and the second node, and configured to receive the first differential signal via the first node, and receive the second differential signal via the second node; and a low pass filter configured to receive a third differential signal converted by the terminating resistor from the first differential signal, and configured to receive a fourth differential signal converted by the terminating resistor from the second differential signal.