Electronic device including antenna device

    公开(公告)号:US10096888B2

    公开(公告)日:2018-10-09

    申请号:US15153069

    申请日:2016-05-12

    Abstract: An electronic device is provided. The electronic device includes a front cover forming a front surface, a rear cover forming a rear surface, a sidewall at least partially enclosing a space formed between the front cover and the rear cover and at least partially formed of a conductive member, a display disposed in the space and including a screen region exposed through the front cover, a non-conductive structure disposed in adjacent to the sidewall or in contact with the sidewall in the space and including a first surface facing the front cover and a second surface facing the rear cover, a first antenna pattern overlapping the non-conductive structure and fed with electricity, a second antenna pattern overlapping the non-conductive structure and disposed adjacent to the first antenna pattern to form electromagnetic-field coupling with the first antenna pattern, and an integrated circuit chip feeding electricity to the first antenna pattern.

    Semiconductor memory device and memory system including the same

    公开(公告)号:US10134487B2

    公开(公告)日:2018-11-20

    申请号:US14713140

    申请日:2015-05-15

    Abstract: A memory device may include a memory cell array, a bloom-filter circuit, a cache memory circuit, and a selecting circuit. The bloom-filter circuit may be configured to output a determination result signal that indicates that there is a possibility that a received address is one of failed addresses corresponding to failed cells of the memory cell array. The cache memory circuit may be configured to, store the failed addresses and a first set of data corresponding to the respective failed addresses, and configured to, when the determination result signal indicates a possibility, provide a comparison result signal by determining whether received address coincides with one of the failed addresses. The selecting circuit may be configured to output either first data of the first set of data or second data of the memory cell array corresponding to the received address based on determination result signal and comparison result signal.

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