公开(公告)号：US20240274664A1

公开(公告)日：2024-08-15

申请号：US18409269

申请日：2024-01-10

Applicant: Samsung Electronics Co., Ltd.

Inventor： Jungmin JU ,  Chansic YOON ,  Gyuhyun KIL ,  Junghoon HAN ,  Weonhong KIM

IPC: H01L29/08 ,  H10B12/00

CPC classification number: H01L29/0847 ,  H10B12/50

Abstract: An integrated circuit device includes a gate stack on a substrate, a spacer on first and second sidewalls of the gate stack, a source/drain area in an upper portion of the substrate on first and second sides of the gate stack, a cover semiconductor layer on the source/drain area, an interlayer insulating film on the cover semiconductor layer and surrounding sidewalls of the gate stack, and a contact in a contact hole that penetrates the interlayer insulating film and the cover semiconductor layer, the contact having a bottom portion contacting the cover semiconductor layer and the source/drain area.