公开(公告)号：US20200168720A1

公开(公告)日：2020-05-28

申请号：US16552150

申请日：2019-08-27

Applicant: Samsung Electronics Co., Ltd.

Inventor： Dae-young Kwak ,  Ji-ye Kim ,  Jung-hwan Chun ,  Min-chan Gwak ,  Dong-hyun Roh ,  Jin-wook Lee ,  Sang-jin Hyun

IPC: H01L29/66 ,  H01L27/11 ,  H01L27/092 ,  H01L29/45 ,  H01L29/78 ,  H01L21/8238

Abstract: An integrated circuit device includes a fin-type active region protruding from a top surface of a substrate and extending in a first direction parallel to the top surface of the substrate, a gate structure intersecting with the fin-type active region and extending on the substrate in a second direction perpendicular to the first direction, a source/drain region on a first side of the gate structure, a first contact structure on the source/drain region, and a contact capping layer on the first contact structure. A top surface of the first contact structure has a first width in the first direction, a bottom surface of the contact capping layer has a second width greater than the first width stated above in the first direction, and the contact capping layer includes a protruding portion extending outward from a sidewall of the first contact structure.

公开(公告)号：US12015063B2

公开(公告)日：2024-06-18

申请号：US17707036

申请日：2022-03-29

Applicant: SAMSUNG ELECTRONICS CO., LTD.

Inventor： Chang-yeon Lee ,  Jin-wook Lee ,  Min-chan Gwak ,  Kye-Hyun Baek ,  Hong-bae Park

IPC: H01L29/417 ,  H01L21/8234 ,  H01L27/088 ,  H01L29/78

CPC classification number: H01L29/41791 ,  H01L21/823431 ,  H01L21/823475 ,  H01L27/0886 ,  H01L29/7851

Abstract: An integrated circuit device including a substrate; a fin-type active region protruding from the substrate; a gate line intersecting the fin-type active region and covering a top surface and side walls thereof; a gate insulating capping layer covering the gate line; source/drain regions at sides of the gate line on the fin-type active region; first conductive plugs connected to the source/drain regions; a hard mask layer covering the first conductive plugs; and a second conductive plug between the first conductive plugs, the second conductive plug connected to the gate line by passing through the gate insulating capping layer and having a top surface higher than the top surface of each first conductive plug, wherein the hard mask layer protrudes from the first conductive plugs and toward the second conductive plug so that a portion of the hard mask layer overhangs from an edge of the first conductive plugs.

公开(公告)号：US11955531B2

公开(公告)日：2024-04-09

申请号：US18174902

申请日：2023-02-27

Applicant: SAMSUNG ELECTRONICS CO., LTD.

Inventor： Dae-young Kwak ,  Ji-ye Kim ,  Jung-hwan Chun ,  Min-chan Gwak ,  Dong-hyun Roh ,  Jin-wook Lee ,  Sang-jin Hyun

IPC: H01L21/8238 ,  H01L27/092 ,  H01L29/45 ,  H01L29/66 ,  H01L29/78 ,  H10B10/00

CPC classification number: H01L29/66515 ,  H01L21/823821 ,  H01L21/823871 ,  H01L27/0924 ,  H01L29/45 ,  H01L29/66795 ,  H01L29/7851 ,  H10B10/12

Abstract: An integrated circuit device includes a fin-type active region protruding from a top surface of a substrate and extending in a first direction parallel to the top surface of the substrate, a gate structure intersecting with the fin-type active region and extending on the substrate in a second direction perpendicular to the first direction, a source/drain region on a first side of the gate structure, a first contact structure on the source/drain region, and a contact capping layer on the first contact structure. A top surface of the first contact structure has a first width in the first direction, a bottom surface of the contact capping layer has a second width greater than the first width stated above in the first direction, and the contact capping layer includes a protruding portion extending outward from a sidewall of the first contact structure.

公开(公告)号：US11626503B2

公开(公告)日：2023-04-11

申请号：US17393217

申请日：2021-08-03

Applicant: SAMSUNG ELECTRONICS CO., LTD.

Inventor： Dae-young Kwak ,  Ji-ye Kim ,  Jung-hwan Chun ,  Min-chan Gwak ,  Dong-hyun Roh ,  Jin-wook Lee ,  Sang-jin Hyun

IPC: H01L29/08 ,  H01L29/66 ,  H01L27/11 ,  H01L27/092 ,  H01L21/8238 ,  H01L29/78 ,  H01L29/45

Abstract: An integrated circuit device includes a fin-type active region protruding from a top surface of a substrate and extending in a first direction parallel to the top surface of the substrate, a gate structure intersecting with the fin-type active region and extending on the substrate in a second direction perpendicular to the first direction, a source/drain region on a first side of the gate structure, a first contact structure on the source/drain region, and a contact capping layer on the first contact structure. A top surface of the first contact structure has a first width in the first direction, a bottom surface of the contact capping layer has a second width greater than the first width stated above in the first direction, and the contact capping layer includes a protruding portion extending outward from a sidewall of the first contact structure.

公开(公告)号：US11309393B2

公开(公告)日：2022-04-19

申请号：US16404857

申请日：2019-05-07

Applicant: SAMSUNG ELECTRONICS CO., LTD.

Inventor： Chang-yeon Lee ,  Jin-wook Lee ,  Min-chan Gwak ,  Kye-Hyun Baek ,  Hong-bae Park

IPC: H01L29/417 ,  H01L21/8234 ,  H01L27/088 ,  H01L29/78

Abstract: An integrated circuit device including a substrate; a fin-type active region protruding from the substrate; a gate line intersecting the fin-type active region and covering a top surface and side walls thereof; a gate insulating capping layer covering the gate line; source/drain regions at sides of the gate line on the fin-type active region; first conductive plugs connected to the source/drain regions; a hard mask layer covering the first conductive plugs; and a second conductive plug between the first conductive plugs, the second conductive plug connected to the gate line by passing through the gate insulating capping layer and having a top surface higher than the top surface of each first conductive plug, wherein the hard mask layer protrudes from the first conductive plugs and toward the second conductive plug so that a portion of the hard mask layer overhangs from an edge of the first conductive plugs.

公开(公告)号：US11114544B2

公开(公告)日：2021-09-07

申请号：US16552150

申请日：2019-08-27

Applicant: Samsung Electronics Co., Ltd.

Inventor： Dae-young Kwak ,  Ji-ye Kim ,  Jung-hwan Chun ,  Min-chan Gwak ,  Dong-hyun Roh ,  Jin-wook Lee ,  Sang-jin Hyun

IPC: H01L29/08 ,  H01L29/66 ,  H01L27/11 ,  H01L27/092 ,  H01L21/8238 ,  H01L29/78 ,  H01L29/45

Abstract: An integrated circuit device includes a fin-type active region protruding from a top surface of a substrate and extending in a first direction parallel to the top surface of the substrate, a gate structure intersecting with the fin-type active region and extending on the substrate in a second direction perpendicular to the first direction, a source/drain region on a first side of the gate structure, a first contact structure on the source/drain region, and a contact capping layer on the first contact structure. A top surface of the first contact structure has a first width in the first direction, a bottom surface of the contact capping layer has a second width greater than the first width stated above in the first direction, and the contact capping layer includes a protruding portion extending outward from a sidewall of the first contact structure.