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公开(公告)号:US20240184641A1
公开(公告)日:2024-06-06
申请号:US18105799
申请日:2023-02-03
Applicant: Samsung Electronics Co., Ltd.
Inventor: Mohammadreza SOLTANIYEH , Xuebin YAO , Ramdas KACHARE
CPC classification number: G06F9/54 , G06F9/4881 , G06F9/5027
Abstract: A device is disclosed. A receiver may receive a portion using a first data format from a source device. A transformation unit may transform the portion into a transformed portion. The transformed portion may use a second data format. A transmitter may deliver the transformed portion to a destination device.
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公开(公告)号:US20240311318A1
公开(公告)日:2024-09-19
申请号:US18513496
申请日:2023-11-17
Applicant: Samsung Electronics Co., Ltd.
Inventor: Ramdas P. KACHARE , Jimmy LAU , Amir BEYGI , Mohammadreza SOLTANIYEH , Tinh LAC , Divya SUBBANNA , Mostafa AGHAEE , Dongwan ZHAO , William TIEN , Varadraj Ninad SINAI KAKODKAR , Luis Vitorio CARGNINI
CPC classification number: G06F13/1694 , G06F13/404 , G06F13/4221
Abstract: A device is disclosed. An interface may connect the device to a processor. The interface may support a first protocol. A first storage and a second storage may the data. The second storage may support a second protocol different from the first protocol. A controller may be connected to the interface and the first storage. A bridge may be connected to the interface, the first storage, and the second storage. The bridge may include a filter configured to coordinate a data transfer between the first storage and the second storage.
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公开(公告)号:US20250156330A1
公开(公告)日:2025-05-15
申请号:US18757476
申请日:2024-06-27
Applicant: Samsung Electronics Co., Ltd.
Inventor: Ramdas KACHARE , Mohammadreza SOLTANIYEH , Jimmy LAU , Hingkwan HUEN
IPC: G06F12/0862 , G06F11/30 , G06F11/34
Abstract: A tiered memory device is disclosed. The tiered memory device may include a first memory and a second memory. A monitoring circuit may monitor the first memory to generate a heat map and a miss map based at least in part on a request received from a processor. A policy engine may evict a first data from the first memory to the second memory and may prefetch a second data from the second memory to the first memory based at least in part on the heat map and the miss map.
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公开(公告)号:US20240419450A1
公开(公告)日:2024-12-19
申请号:US18506993
申请日:2023-11-10
Applicant: Samsung Electronics Co., Ltd.
Inventor: Mohammadreza SOLTANIYEH , Xuebin YAO , Ramdas KACHARE
Abstract: Systems and methods for parallel data processing. In some embodiments, the system includes: a first processing chain; and a second processing chain, the first processing chain including: a first core; a second core; and a first inter-core bus connecting the second core of the first processing chain to the first core of the first processing chain the system being configured to forward an output of a calculation of the first processing chain to the second processing chain.
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公开(公告)号:US20250071301A1
公开(公告)日:2025-02-27
申请号:US18505090
申请日:2023-11-08
Applicant: Samsung Electronics Co., Ltd.
Inventor: Gongjin SUN , Ramdas KACHARE , Mohammadreza SOLTANIYEH , Caroline KAHN , Xuebin YAO
IPC: H04N19/423 , H04N19/17 , H04N19/186 , H04N19/436 , H04N19/625 , H04N19/80 , H04N19/86 , H04N19/91
Abstract: A system and method for in-storage video processing. In some embodiments, the system includes a computational storage device, the computational storage device including non-volatile storage and a processing circuit. The processing circuit may be configured to process a first data unit and to process a second data unit, in parallel with the first data unit.
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公开(公告)号:US20230099831A1
公开(公告)日:2023-03-30
申请号:US17568714
申请日:2022-01-04
Applicant: Samsung Electronics Co., Ltd.
Inventor: Mohammadreza SOLTANIYEH , Veronica LAGRANGE MOUTINHO DOS REIS , Matthew BRYSON , Xuebin YAO
IPC: G06F3/06
Abstract: Provided are systems, methods, and apparatuses for computational offload to storage systems. The method can include a first processing element issuing a first request to the storage device; a storage device, responsive to the first request, obtaining first data on the storage device and providing the first data to the first memory for storage; the second processing element reading the first data from the first memory and performing at least one of an operation or a computation on the first data to generate second data; and the second processing element providing the second data to the first processing element.
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公开(公告)号:US20250061063A1
公开(公告)日:2025-02-20
申请号:US18793746
申请日:2024-08-02
Applicant: Samsung Electronics Co., Ltd.
Inventor: Luis Vitorio CARGNINI , Andrew Zhenwen CHANG , Yitu WANG , Mohammadreza SOLTANIYEH , Dongyang LI
IPC: G06F12/12
Abstract: A device may include memory media configured as cache media; and one or more circuits configured to perform operations including receiving memory access information, performing a mixture model analysis based on the memory access information to produce one or more scores, and updating the memory media based on the one or more scores. The memory media may include determining that at least one of the one or more scores is above a threshold and loading a portion of memory corresponding to the at least one of the one or more scores to the memory media. Updating the memory media may include determining that at least one of the one or more scores is below a threshold and removing a portion of memory corresponding to the at least one of the one or more scores from the memory media.
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公开(公告)号:US20240311049A1
公开(公告)日:2024-09-19
申请号:US18515218
申请日:2023-11-20
Applicant: Samsung Electronics Co., Ltd.
Inventor: Ramdas P. KACHARE , Jimmy LAU , Mohammadreza SOLTANIYEH , Amir BEYGI , Tinh LAC , Divya SUBBANNA , Mostafa AGHAEE , Dongwan ZHAO , William TIEN , Varadraj Ninad SINAI KAKODKAR , Luis Vitorio CARGNINI
IPC: G06F3/06
CPC classification number: G06F3/0659 , G06F3/0611 , G06F3/0673
Abstract: A memory device is disclosed. The memory device may include an interface to connect the memory device to a processor, a first storage for a data, and a second storage for the data. A controller may process a request received from the processor via the interface using the first storage or the second storage. A policy engine may instruct the controller regarding a storing of the data in the first storage or the second storage.
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公开(公告)号:US20240070199A1
公开(公告)日:2024-02-29
申请号:US18456955
申请日:2023-08-28
Applicant: Samsung Electronics Co., Ltd.
Inventor: Seongyoung KANG , Mohammadreza SOLTANIYEH , Xuebin YAO
IPC: G06F16/901
CPC classification number: G06F16/9024
Abstract: Methods and memory devices are provided in which at least one parser of a memory device converts graph input data into an edge list and a vertex list for a graph database. A merge sorter of the memory device sorts the vertex list to generate a sequential list of vertices. The edge list is converted into a translated list of edges using identifiers (IDs) of the sequential list of vertices. The merge sorter sorts the translated list of edges to generate a sequential list of edges. The graph database is generated using the sequential list of edges.
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