公开(公告)号：US11927879B2

公开(公告)日：2024-03-12

申请号：US17407642

申请日：2021-08-20

Applicant: SAMSUNG ELECTRONICS CO., LTD.

Inventor： Moosong Lee ,  Seung Yoon Lee ,  Jeongjin Lee

IPC: G03F1/22 ,  G03F1/24 ,  G03F1/42 ,  G03F7/20 ,  G03F9/00

CPC classification number: G03F1/22 ,  G03F1/24 ,  G03F1/42 ,  G03F7/2004 ,  G03F7/2022 ,  G03F9/7003 ,  G03F9/7084

Abstract: A method includes forming a first photomask including N mask chip regions and a first mask scribe lane region surrounding each of the N mask chip regions, forming a second photomask including M mask chip regions and a second mask scribe lane region surrounding each of the M mask chip regions, performing a first semiconductor process including a first photolithography process using the first photomask on a semiconductor wafer; and performing a second semiconductor process including a second photolithography process using the second photomask on the semiconductor wafer. The first photolithography process is an extreme ultraviolet (EUV) photolithography process, the first photomask is an EUV photomask, N is a natural number of 2 or more, and M is two times N.

公开(公告)号：US11762277B2

公开(公告)日：2023-09-19

申请号：US17358785

申请日：2021-06-25

Applicant: Samsung Electronics Co., Ltd.

Inventor： Moosong Lee ,  Seongbo Shim

IPC: G03F1/22 ,  G03F1/24

CPC classification number: G03F1/22 ,  G03F1/24

Abstract: An EUV photomask may include a multi-layered structure on a substrate, a capping layer on the multi-layered structure, and an absorber on the capping layer. The absorber may include a first sidewall and a second sidewall. The first sidewall may extend from an upper surface of the capping layer in a vertical direction substantially perpendicular to an upper surface of the substrate, and may be a flat plane. The second sidewall may extend from the first sidewall in the vertical direction, and may be a curved surface.

公开(公告)号：US20220100077A1

公开(公告)日：2022-03-31

申请号：US17407642

申请日：2021-08-20

Applicant: SAMSUNG ELECTRONICS CO., LTD.

Inventor： Moosong Lee ,  Seung Yoon Lee ,  Jeongjin Lee

IPC: G03F1/22 ,  G03F7/20

Abstract: A method includes forming a first photomask including N mask chip regions and a first mask scribe lane region surrounding each of the N mask chip regions, forming a second photomask including M mask chip regions and a second mask scribe lane region surrounding each of the M mask chip regions, performing a first semiconductor process including a first photolithography process using the first photomask on a semiconductor wafer; and performing a second semiconductor process including a second photolithography process using the second photomask on the semiconductor wafer. The first photolithography process is an extreme ultraviolet (EUV) photolithography process, the first photomask is an EUV photomask, N is a natural number of 2 or more, and M is two times N.