公开(公告)号：US20240324190A1

公开(公告)日：2024-09-26

申请号：US18611146

申请日：2024-03-20

Applicant: Samsung Electronics Co., Ltd.

Inventor： Yunho SONG ,  Jooncheol KIM ,  Bosu KIM ,  Yeji KIM ,  Subin SON ,  Hyundon YUN ,  Namkyeong LEE

IPC: H10B12/00

CPC classification number: H10B12/50 ,  H10B12/482

Abstract: An integrated circuit device includes a substrate including a cell array area and a peripheral circuit area next to the cell array area, an isolation layer defining an activation region of the substrate in the peripheral circuit area, the isolation layer including a first insulation pattern and a second insulation pattern surrounding the first insulation pattern, and a gate structure on the substrate in the peripheral circuit area, wherein the second insulation pattern includes one or more surfaces defining a recess into an upper surface of the substrate in a vertical direction, the vertical direction extending perpendicular to the upper surface of the substrate.