公开(公告)号：US20240404970A1

公开(公告)日：2024-12-05

申请号：US18441578

申请日：2024-02-14

Applicant: Samsung Electronics Co., Ltd.

Inventor： MINKI KIM ,  RAEYOUNG KANG ,  JIHOON KIM ,  JINKYEONG SEOL ,  HYUEKJAE LEE

IPC: H01L23/00 ,  H01L23/528 ,  H01L25/065

Abstract: A semiconductor package includes a first die having signal and dummy regions, and a second die on the first die. The first die includes first dummy patterns arranged in a first direction on the dummy region, second dummy patterns on the dummy region and between the first dummy patterns, a first dielectric layer on the first and second dummy patterns, and first pads extending through the first dielectric layer and coupled to the first dummy patterns. The second die includes second pads on the dummy region, and third pads on the dummy region. On an interface between the first and second dies, the first pads are in contact with the second pads. The first dielectric layer is between the second dummy patterns and the third pads. The first dummy patterns are connected to a ground circuit or power circuit of the first die.