公开(公告)号：US20220392878A1

公开(公告)日：2022-12-08

申请号：US17585122

申请日：2022-01-26

Applicant: SAMSUNG ELECTRONICS CO., LTD.

Inventor： SUNGWOO PARK ,  HEONWOO KIM ,  SANGCHEON PARK ,  WONIL LEE

IPC: H01L25/10 ,  H01L23/538 ,  H01L23/00 ,  H01L25/065

Abstract: A semiconductor device including an interposer including a central region and an edge region entirely surrounding the central region, wherein the interposer includes a wiring structure disposed in the first region and a metal structure disposed continuously within the entirety of the second region, a first semiconductor chip mounted in the central region and connected to the wiring structure, and a second semiconductor chip mounted in the central region adjacent to the first semiconductor chip and connected to the second wiring structure.

公开(公告)号：US20240421000A1

公开(公告)日：2024-12-19

申请号：US18392481

申请日：2023-12-21

Applicant: Samsung Electronics Co., Ltd.

Inventor： YANGGYOO JUNG ,  YOUNG LYONG KIM ,  SUNGWOO PARK

IPC: H01L21/78 ,  H01L23/00

Abstract: A semiconductor die includes: a first surface; a second surface opposite to the first surface; and a first side surface, a second side surface, a third side surface, and a fourth side surface between the first surface and the second surface, in which the first side surface faces the third side surface, and a roughness of the second side surface varies according to area, and a roughness of at least a portion of the second side surface is greater than that of the first side surface.

公开(公告)号：US20220301958A1

公开(公告)日：2022-09-22

申请号：US17535937

申请日：2021-11-26

Applicant: SAMSUNG ELECTRONICS CO., LTD.

Inventor： SUNGWOO PARK ,  SOOHYUN NAM ,  HYUNJUNG SONG ,  MINSEUNG YOON

IPC: H01L23/29 ,  H01L23/31 ,  H01L23/00 ,  H01L23/367 ,  H01L25/18

Abstract: A semiconductor package includes a circuit board mounting a first semiconductor chip and a second semiconductor chip laterally separated by an intermediate space, an underfill including an extended portion protruding upward into the intermediate space, a surface modification layer on opposing side surfaces of the first semiconductor chip and the second semiconductor chip, wherein wettability of the underfill with respect to the surface modification layer is less than wettability of the underfill with respect to the side surfaces of the first semiconductor chip and the second semiconductor chip, and a molding member on the upper surface of the circuit board, covering an upper surface of the extended portion of the underfill, and surrounding the first semiconductor chip and the second semiconductor chip.

公开(公告)号：US20230088264A1

公开(公告)日：2023-03-23

申请号：US17839413

申请日：2022-06-13

Applicant: SAMSUNG ELECTRONICS CO., LTD.

Inventor： SANGCHEON PARK ,  HEONWOO KIM ,  SUNGWOO PARK ,  CHAJEA JO

IPC: H01L23/498 ,  H01L23/00

Abstract: A semiconductor package includes an interposer substrate on a package substrate. The interposer substrate includes an upper pad on an upper surface of the insulating layer, a lower pad on a lower surface of the insulating layer, and a redistribution structure penetrating the insulating layer between the upper surface and the lower surface to connect the upper pad and the lower pad. A semiconductor chip is disposed above the interposer substrate and connected to the upper pad, and a connection bump directly contacts a lower surface of the lower pad. The redistribution structure includes redistribution layers and redistribution vias connected to the redistribution layers, wherein each of the redistribution layers and each of the redistribution vias includes a metal material layer and a plating seed layer, and the lower pad directly contacts the plating seed layer.

公开(公告)号：US20220415758A1

公开(公告)日：2022-12-29

申请号：US17658614

申请日：2022-04-08

Applicant: SAMSUNG ELECTRONICS CO., LTD.

Inventor： YOUNGBAE KIM ,  SUNGWOO PARK

IPC: H01L23/495 ,  H01L23/00

Abstract: A semiconductor package includes: a lead frame that includes a first surface and a second surface opposite to the first surface, where the lead frame includes a first lead that extends in a first direction, and a plurality of second leads that are spaced apart from the first lead on both sides of the first lead; at least one semiconductor chip mounted on the first surface of the lead frame by a plurality of bumps; and an encapsulant that encapsulates the lead frame and the at least one semiconductor chip, wherein the first lead has a groove in the first surface that partitions the plurality of bumps in contact with the first lead.

公开(公告)号：US20220013445A1

公开(公告)日：2022-01-13

申请号：US17154067

申请日：2021-01-21

Applicant: SAMSUNG ELECTRONICS CO., LTD.

Inventor： UNGCHEON KIM ,  SUNGWOO PARK ,  YUKYUNG PARK ,  SEUNGKWAN RYU

IPC: H01L23/498 ,  H01L21/48

Abstract: An interposer including a base layer, a redistribution structure on a first surface of the base layer and including a conductive redistribution pattern, a first lower protection layer on a second surface of the base layer, a lower conductive pad on the first lower protection layer, a through electrode connecting the conductive redistribution pattern and the lower conductive pad, a second lower protection layer on the first lower protection layer, including a different material than the first lower protection layer, and contacting at least a portion of the lower conductive pad, and an indentation formed in an outer edge region of the interposer to provide a continuous angled sidewall extending entirely through the second lower protection layer and through at least a portion of the first protection layer.