公开(公告)号：US20200071613A1

公开(公告)日：2020-03-05

申请号：US16502164

申请日：2019-07-03

Applicant: Samsung Electronics Co., Ltd.

Inventor： Bo-yun KIM ,  Kenji Takai ,  Do-yoon KIM ,  Sang-kyun KIM ,  Bo-un YOON

IPC: C09K13/00 ,  C09G1/06 ,  H01L21/321 ,  H01L21/28 ,  H01L29/66

Abstract: Disclosed is a slurry composition for chemical mechanical polishing (CMP) includes, as polishing particles, a complex compound of both fullerenol and alkylammonium hydroxide. The slurry composition, which exhibits excellent polishing properties, may be prepared at low cost in large quantities. Also disclosed is a method of preparing the slurry composition comprising obtaining a mixture of a fullerenol complex compound and unreacted hydrogen peroxide by reacting alkylammonium hydroxide, hydrogen peroxide, and fullerene, removing the unreacted hydrogen peroxide by adding hydrogen peroxide decomposition catalyst particles to the mixture, separating the hydrogen peroxide decomposition catalyst particles from the mixture by filtration, and adding a polishing additive to the mixture. Further disclosed is a method of fabricating a semiconductor device that includes providing a pattern defining a trench, forming a metal material film on the pattern to fill the trench, and performing CMP of the metal material film using the slurry composition.

公开(公告)号：US20160086813A1

公开(公告)日：2016-03-24

申请号：US14708544

申请日：2015-05-11

Applicant: Samsung Electronics Co., Ltd.

Inventor： Ye-hwan KIM ,  Un-gyu PAIK ,  Ji-hoon SEO ,  Sang-kyun KIM ,  Jong-woo KIM ,  Dong-jun LEE

IPC: H01L21/306 ,  H01L29/66 ,  H01L21/8234

CPC classification number: H01L29/66545 ,  H01L21/31053 ,  H01L21/823437

Abstract: A method of fabricating a semiconductor device includes forming an active region in a semiconductor substrate, forming a plurality of dummy gates on the active region, the plurality of dummy gates having a gate mask disposed thereon, forming an interlayer insulating layer on the gate mask, and performing a one-time chemical mechanical polishing (CMP) process by using a slurry composition capable of polishing the interlayer insulating layer and the gate mask until top surfaces of the dummy gates are exposed.

Abstract translation: 一种制造半导体器件的方法包括在半导体衬底中形成有源区，在有源区上形成多个虚拟栅极，多个伪栅极具有栅极掩模，在栅极掩模上形成层间绝缘层， 并且通过使用能够抛光层间绝缘层和栅极掩模的浆料组合物直到伪栅极的顶表面露出来进行一次化学机械抛光（CMP）工艺。