公开(公告)号：US20230051857A1

公开(公告)日：2023-02-16

申请号：US17540662

申请日：2021-12-02

Applicant: Samsung Electronics Co., Ltd.

Inventor： Kwanghee LEE ,  Sangwook KIM ,  Euntae KIM ,  Jeeeun YANG ,  Moonil JUNG ,  Sangjun HONG

IPC: H01L29/786 ,  H01L29/417

Abstract: Provided are oxide semiconductor transistors. The oxide semiconductor transistor includes a substrate, a channel layer arranged on the substrate and having a flat plate shape extending along one plane, a gate electrode facing a part of the channel layer, and a source region and a drain region separated from each other with the gate electrode therebetween, wherein the source region contacts three or more surfaces of the channel layer, and the drain region contacts three or more surfaces of the channel layer.

公开(公告)号：US20220271056A1

公开(公告)日：2022-08-25

申请号：US17744092

申请日：2022-05-13

Applicant: SAMSUNG ELECTRONICS CO., LTD.

Inventor： Jisung CHEON ,  Byunggon PARK ,  Joowon PARK ,  Sangjun HONG ,  Jinsoo LIM

IPC: H01L27/11582 ,  H01L27/11524 ,  H01L27/11556 ,  H01L27/1157 ,  H01L23/522 ,  H01L23/528 ,  H01L21/768 ,  H01L21/28 ,  H01L23/535

Abstract: An integrated circuit device including a substrate having a cell and interconnection region; and a first stacked structure and a second stacked structure on the first stacked structure, each of the first and second stacked structures including insulating layers and word line structures that are alternately stacked one by one on the substrate in the cell region and the interconnection region, wherein, in the interconnection region the first stacked structure includes a first dummy channel hole penetrating through the first stacked structure, the second stacked structure includes a second dummy channel hole communicatively connected to the first dummy channel hole, the second dummy channel hole penetrating through the second stacked structure, respectively, and a first dummy upper width of an uppermost end of the first dummy channel hole is greater than a second dummy upper width of an uppermost end of the second dummy channel hole.

公开(公告)号：US20210183885A1

公开(公告)日：2021-06-17

申请号：US17025120

申请日：2020-09-18

Applicant: SAMSUNG ELECTRONICS CO., LTD.

Inventor： Seongyeon WOO ,  Sangjun HONG ,  Jinsoo LIM ,  Jisung CHEON

IPC: H01L27/11582 ,  H01L27/11565 ,  H01L27/11519 ,  H01L27/11556 ,  G11C8/14

Abstract: A semiconductor device includes: a first gate stack including a plurality of first gate electrodes; a second gate stack arranged on the first gate stack and including a plurality of second gate electrodes; and a plurality of channel structures arranged in a plurality of channel holes penetrating the first gate stack and the second gate stack. Each of the channel holes includes a first channel hole portion penetrating the first gate stack and a second channel hole portion penetrating the second gate stack, and a ratio of a second width in the second direction to a first width in the first direction of an upper end of the first channel hole portion is less than a ratio of a fourth width in the second direction to a third width in the first direction of an upper end of the second channel hole portion.